;;;MODIFICATION HISTORY
;;;
;;; 15 NOV 75 OBTAINED FROM DEC (KLDCP REV 7)
;;; 15 NOV 75 CONVERTED TO PALX FORMAT
;;; 12 AUG 76 MODIFY LITERAL GENERATING MACROS TO AVOID ODD NUMBER OF BYTES
;;;
.SBTTL *PRM11* DECSYSTEM10 PDP-11 PROGRAM/SUBROUTINE PARAMETERS, 4-AUG-75
;PROGRAM CONTROL SWITCHES
ABORT==100000 ;ABORT AT PROGRAM PASS COMPLETION
RSTART==40000 ;RESTART TEST
TOTALS==20000 ;PRINT TEST TOTALS
NOPNT==10000 ;INHIBIT ALL PRINT OUT (EXCEPT FORCED)
PNTLPT==4000 ;PRINT ON LINE-PRINTER
DING==2000 ;RING TTY BELL ON ERROR
LOOPER==1000 ;LOOP ON ERROR
ERSTOP==400 ;HALT ON ERROR
PALERS==200 ;PRINT ALL ERRORS
RELIAB==100 ;RELIABILITY RUN MODE
TXTINH==40 ;TEXT INHIBIT
INHPAG==20 ;INHIBIT PAGING (PDP-10)
MODDVC==10 ;MODIFY DEVICE CODE (PDP-10)
INHCSH==4 ;INHIBIT CACHE (PDP-10)
OPRSEL==2 ;OPERATOR SELECTION
CHAIN==1 ;CHAIN CONTROL SWITCH
;OPERATOR DEFINITION - SUBROUTINE CALLS
.SBTTL EMT DEFS
FATAL= EMT!0 ;FATAL PROGRAMMING ERROR.
ERRHLT= EMT!1 ;PROGRAM HALT, ONLY IF "ERSTOP" SWITCH SET
PRGHLT= EMT!2 ;PROGRAM HALT, DON'T CHECK SWITCH
RUNLP= EMT!3 ;CONSOLE IDLE RUN LOOP
DFLEGAL=EMT!226 ;DIAGNOSTIC FUNCTION LEGALITY CHECK
;TELETYPE INPUT DEFINITIONS
; *** CALL SEQUENCE ***
; TT----
; RETURN, C BIT SET FOR NO/ERROR RESPONSE
TTILIN= EMT!4 ;READ TTY LINE INPUT INTO BUFFER
TTILNW= EMT!224 ;READ TTY LINE INPUT, WAIT FOREVER
TTICCL= EMT!225 ;PROCESS TTY INPUT FROM INDIRECT CCL BUFFER
TTICHR= EMT!5 ;INPUT A CHARACTER FROM BUFFER
TTBACK= EMT!144 ;BACKUP INPUT POINTER
TTLOOK= EMT!6 ;LOOK FOR A TTY INPUT
TTIOCT= EMT!7 ;INPUT AN OCTAL NUMBER FROM BUFFER
TTCOCT= EMT!10 ;INPUT & CHECK OCTAL, RTN IF OK
TTOCTE= EMT!200 ;INPUT EVEN OCTAL NUMBER
TTIDEC= EMT!11 ;INPUT A DECIMAL NUMBER FROM BUFFER
TTIYES= EMT!12 ;ASK YES-NO, N BIT ON NO, C BIT SET ON ERROR
TTALTM= EMT!13 ;ALT-MODE CHECK, C BIT SET IF NON-ALT-MODE
TTI36= EMT!14 ;READ 36 DIGIT NUMBER FROM BUFFER
TTIBRK= EMT!15 ;GET NUMBER INPUT BREAK CHARACTER
TTISDL= EMT!16 ;SPACE DELETE, C BIT SET ON NON-NUMBER
TTISDO= EMT!17 ;SPACE DELETE & OCTAL INPUT, RTN IF OK
TTIS36= EMT!20 ;SPACE DELETE & 36BIT INPUT, RTN IF OK
TTICRA= EMT!21 ;INPUT C-RAM ADDRESS
TTITRM= EMT!22 ;CHECK INPUT TERMINATOR, RTN IF OK
TTBTRM= EMT!23 ;BACKUP, THEN "
TTERM= EMT!201 ;NUMBER TERMINATION CHECK, C BIT SET IF ERROR
TTPINI= EMT!217 ;INITIALIZE INPUT & OUTPUT BUFFER POINTERS
;TELETYPE OUTPUT DEFINITIONS
; *** CALL SEQUENCE ***
; MOV ARG,R0 ;IF CALL REQUIRES AN ARGUMENT
; P-----
PNTAL= EMT!24 ;PRINT ASCII LINE, ADDRESS IN R0
$PMSG= EMT!25 ;PRINT MESSAGE, TRAILING PARAMETER
$PMSGR= EMT!26 ;PRINT MESSAGE, CONDITIONAL ON "RPTFLG"
PNTCHR= EMT!27 ;PRINT ASCII CHARACTER IN R0
PNTCI= EMT!214 ;PRINT CHAR IMMEDIATE, TRAILING CHARS
PNTNBR= EMT!30 ;PRINT NUMBER
PCRLF= EMT!31 ;PRINT CR-LF
PSPACE= EMT!32 ;PRINT A SPACE
PSLASH= EMT!33 ;PRINT A SLASH
PCOMMA= EMT!34 ;PRINT A COMMA
PTAB= EMT!227 ;PRINT A TAB
PNTOCT= EMT!35 ;PRINT OCTAL NUMBER IN R0
PNTOCS= EMT!36 ;PRINT OCTAL IN R0, SUPPRESS LEADING ZEROS
PNTDEC= EMT!37 ;PRINT DECIMAL NUMBER IN R0
PNT18= EMT!40 ;PRINT LOWER 18 OF 36 BIT NUMBER
PNT23= EMT!41 ;PRINT LOWER 23 BITS OF 36 BIT NUMBER
PNT22= EMT!41 ; " OLD PNT23 "
PNT36= EMT!42 ;PRINT 36 BIT NUMBER, ADDRESS IN R0
PNT36B= EMT!134 ;PRINT 36 BIT NUMBER IN BINARY
PNTADR= EMT!137 ;PRINT PDP-10 ADDRESS
PFORCE= EMT!43 ;SET FORCED PRINTOUT FLAG
PNORML= EMT!44 ;CLEAR FORCED PRINTOUT FLAG
PBELL= EMT!45 ;DING THE TTY BELL
PNTODC= EMT!46 ;PRINT SPECIFIED OCTAL DIGITS
PNTODT= EMT!47 ;PRINT SPECIFIED DIGITS, TRAILING PARAMETER
PRINTT= EMT!151 ;PRINT, TTY OUTPUT
PTTY= EMT!152 ;PRINT, TTY DRIVER
PLPT= EMT!153 ;PRINT, LPT DRIVER
PLDBUF= EMT!154 ;PRINT, LOAD BUFFER
PNTBAK= EMT!177 ;PRINT, BACKUP OUTPUT INSERTION POINTER
PNTRST= EMT!215 ;PRINT, OUTPUT POINTERS RESET
;MISCELLANEOUS FUNCTIONS
REGSAV= EMT!50 ;SAVE R0 THROUGH R5
REGRST= EMT!51 ;RESTORE R0 THROUGH R5
SHIFTR= EMT!53 ;SHIFT R0 RIGHT, TRAILING PARAMETER
SHIFTL= EMT!54 ;SHIFT R0 LEFT, TRAILING PARAMETER
PROL36= EMT!146 ;ROTATE LEFT 36 BITS
SETFLG= EMT!55 ;SET -1 TO FLAG, TRAILING PARAMETER
MULTPY= EMT!72 ;MULTIPLY
TDELAY= EMT!56 ;SMALL DELAY
SWITCH= EMT!57 ;READ THE SWITCH REGISTER, RETURNED IN R0
SWTSAM= EMT!60 ;RETURN PRESENT STORED SWITCHES IN R0
EOP= EMT!61 ;END OF PASS ROUTINE, RETURNS IF NOT COMPLETED
ERREOP= EMT!62 ;ERROR END OF PASS
EOPSET= EMT!63 ;SET END OF PASS PRINTOUT INTERVAL
;DEVICE ROUTINES
NAMEXT= EMT!206 ;FILE NAME.EXT PROCESS
DTAFILE=EMT!207 ;DECTAPE FILE SELECTION
RPFILE= EMT!210 ;RP04 FILE SELECTION
R50UPK= EMT!155 ;RAD50 TO ASCII UNPACK
ASCR50= EMT!165 ;ASCII TO RAD50 CONVERSION
DTINIT= EMT!156 ;DECTAPE INITIALIZATION
RPINIT= EMT!157 ;RP04 INITIALIZATION
RPLOAD= EMT!166 ;RP04 LOAD PACK
DVDATA= EMT!160 ;DEVICE DATA BLOCK READ
DTRDFL= EMT!211 ;DECTAPE READ FILE
DTWTFL= EMT!212 ;DECTAPE WRITE FILE
DTBASE= EMT!213 ;RETURN DECTAPE PARAMETER BASE ADDRESS
DTREAD= EMT!161 ;DECTAPE READ
DTWRT= EMT!205 ;DECTAPE WRITE
RPFIND= EMT!167 ;RP04 FIND FILE
RPLKUP= EMT!170 ;RP04 FILE DIRECTORY LOOKUP
RPRDFL= EMT!171 ;RP04 READ FILE
RPWRFL= EMT!172 ;RP04 WRITE FILE
RPREAD= EMT!162 ;RP04 READ
RPWRIT= EMT!173 ;RP04 WRITE
RPADDR= EMT!174 ;RP04 ADDRESS CALCULATION
RPBASE= EMT!175 ;RETURN RP04 PARAMETER BLOCK BASE ADDRESS
RPERROR=EMT!237 ;RP04 ERROR REPORTER
DVFRAM= EMT!163 ;DEVICE DATA FRAME READ
DVWRD= EMT!164 ;DEVICE WORD READ
RXFILE= EMT!230 ;RX11/RX01 FLOPPY FILE SELECTION
RXINIT= EMT!231 ; FLOPPY INITIALIZATION
RXRDFL= EMT!232 ; FLOPPY READ FILE
RXWTFL= EMT!233 ; FLOPPY WRITE FILE
RXBASE= EMT!234 ; FLOPPY PARAMETER BLOCK BASE ADDRESS
RXREAD= EMT!235 ; FLOPPY READ
RXWRT= EMT!236 ; FLOPPY WRITE
;COMMUNICATION ROUTINES
COMCMD= EMT!220 ;COMMUNICATIONS COMMAND
COMRTRY=EMT!221 ;COMMUNICATIONS COMMAND RETRY
COMENQ= EMT!222 ;COMMUNICATIONS ENQUIRY
COMEOT= EMT!223 ;COMMUNICATIONS END OF TRANSMISSION
COMLIN= EMT!64 ;COMMUNICATIONS LINE INPUT
COMSND= EMT!65 ;COMMUNICATIONS LINE OUTPUT
COMACK= EMT!66 ;COMMUNICATIONS ACKNOWLEDGE
COMNAK= EMT!67 ;COMMUNICATIONS NEGATIVE ACKNOWLEDGE
COMCLR= EMT!70 ;COMMUNICATIONS CLEAR
COMCTL= EMT!71 ;COMMUNICATIONS CONTROL SEQUENCE
;KL10 ROUTINES
WCRAM= EMT!73 ;WRITE IN TO C-RAM
RCRAM= EMT!74 ;READ THE C-RAM
WWADR= EMT!75 ;WRITE C-RAM ADDRESS
MICNUL= EMT!203 ;C-RAM FILL WITH 0'S
MICFIL= EMT!204 ;C-RAM FILL WITH 1'S
MRESET= EMT!76 ;MASTER RESET
TENSW= EMT!145 ;PDP-10 SWITCHES
TENSP= EMT!77 ;TURN OFF TEN RUNNING
TENCHR= EMT!176 ;PDP-10 LAST TYPED CHARACTER
SM= EMT!100 ;START MACHINE
EXCT= EMT!101 ;EXECUTE PDP10 INSTR, REQUIRES SM
LODAR= EMT!102 ;SPECIAL AR LOAD FOR EXCT AND MBOX TEST
SETMPH= EMT!147 ;SET M-BOX PHASE
ECLOK= EMT!135 ;E BOX CLOCK
ESYNC= EMT!136 ;E BOX SYNC
EXAM= EMT!103 ;EXAMINE 10 MEMORY
EXAMT= EMT!104 ;EXAMINE 10 MEMORY, TRAILING PARAMETERS
DPOS= EMT!105 ;DEPOSIT INTO 10 MEMORY
DPOST= EMT!106 ;DEPOSIT INTO 10 MEMORY, TRAILING PARAMETERS
DPOSVR= EMT!107 ;DEPOSIT AND VERIFY 10 MEMORY
DPOSVT= EMT!110 ;DEPOSIT AND VERIFY 10 MEMORY, TRAILING PARAMETERS
D10MON= EMT!111 ;DEPOSIT -1 INTO 10 FLAG WORD
D10ZRO= EMT!112 ;PDP-10 MEMORY ZERO
CMPR36= EMT!52 ;COMPARE 5 BYTE 36-BIT WORD
DTEBAS= EMT!113 ;RETURN DTE20 BASE ADDRESS
DFXCT= EMT!114 ;DIAGNOSTIC FUNCTION EXECUTE
DFXCTT= EMT!115 ;DF EXECUTE, TRAILING PARAMETER
DFRD= EMT!116 ;DIAGNOSTIC FUNCTION READ
DFRDT= EMT!140 ;DF READ, TRAILING PARAMETER
DFRDMV= EMT!117 ;DIAGNOSTIC FUNCTION READ & MOVE
DFWRT= EMT!120 ;DIAGNOSTIC FUNCTION WRITE
DFWRTT= EMT!141 ;DF WRITE, TRAILING PARAMETERS
DFWIR= EMT!121 ;DIAGNOSTIC FUNCTION WRITE IR
DFSCLK= EMT!122 ;DIAGNOSTIC FUNCTION, SINGLE STEP CLOCK
DFPC= EMT!123 ;DIAGNOSTIC FUNCTION READ PC
DFVMA= EMT!124 ;DIAGNOSTIC FUNCTION READ VMA
DFADB= EMT!125 ;DIAGNOSTIC FUNCTION READ ADDRESS BREAK
DFVMAH= EMT!150 ;DIAGNOSTIC FUNCTION READ VMA HELD
RDRAM= EMT!126 ;READ D-RAM
WDRAM= EMT!127 ;WRITE D-RAM
DRAMAD= EMT!130 ;SELECT D-RAM ADDRESS
CLKPRM= EMT!202 ;RETURN ADDRESS OF "CLKDFL" WORD
BURST= EMT!131 ;BURST M-BOX CLOCK
PNTCPU= EMT!132 ;PRINT CPU, C-RAM & REGISTERS
PNTCRM= EMT!142 ;PRINT C-RAM, LOGICAL FIELD FORMAT
PNTDRM= EMT!143 ;PRINT D-RAM, LOGICAL FIELD FORMAT
PRGCMD= EMT!133 ;PROGRAM COMMAND
PRGNPT= EMT!216 ;PROGRAM COMMAND, NO PRINT
.SBTTL MACRO DEFS
.IIF P2, $$CLIT==$$LITT ;LITERAL STORAGE ASSIGNMENT
.IELSE $$CLIT==2000 ;DOESN'T MATTER ON PASS 1 BUT HAS TO BE DEFINED
.MACRO PMSG $ARG
$PMSG
$$CLIT
; .NLIST SRC
$$CLC==.
.=$$CLIT
.ASCIZ $ARG
.IIF NZ .&1, .BYTE 0 ;ASCIIZER LOSSAGE
$$CLIT==.
.=$$CLC
; .LIST SRC
.ENDM
.MACRO PMSGR $ARG
$PMSGR
$$CLIT
; .NLIST SRC
$$CLC==.
.=$$CLIT
.ASCIZ $ARG
.IIF NZ .&1, .BYTE 0 ;ASCIIZER LOSSAGE
$$CLIT==.
.=$$CLC
; .LIST SRC
.ENDM
.MACRO PNTMSG $ARG
MOV #$$CLIT,R0
PNTAL
; .NLIST SRC
$$CLC==.
.=$$CLIT
.ASCIZ $ARG
.IIF NZ .&1, .BYTE 0 ;ASCIIZER LOSSAGE
$$CLIT==.
.=$$CLC
; .LIST SRC
.ENDM
.MACRO EXIT
JMP $EXIT
.ENDM
.MACRO EXITSKP
JMP $EXITS
.ENDM
.MACRO EXITERR
JMP $EXITE
.ENDM
;BASIC MACROS
.MACRO PUSH A
; .NLIST SRC
.IRP B,
MOV B,-(SP) ;PUSH B ON STACK
.ENDM
; .LIST SRC
.ENDM
.MACRO POP A
; .NLIST SRC
.IRP B,
MOV (SP)+,B ;POP STACK INTO B
.ENDM
; .LIST SRC
.ENDM
.MACRO MULT SOURCE,REG
PUSH SOURCE
PUSH REG
MULTPY
POP REG
.NTYPE X,REG
.IF EQ X&1
.IFT
POP REG+1
.IFF
INC SP
INC SP
.ENDC
.ENDM
.MACRO .LIT $LTAG,$LARG
$$CLC==.
.=$$CLIT
.EVEN
$LTAG=.
.IIF B <$LARG>,0
.IIF NB <$LARG>,$LARG
.EVEN
$$CLIT==.
.=$$CLC
.ENDM
.MACRO SL REG,NUM
; .NLIST SRC
.IF GT NUM-7
.IFT
SWAB REG
.REPT NUM-8.
ASL REG
.ENDR
.IFF
.REPT NUM
ASL REG
.ENDR
.ENDC
; .LIST SRC
.ENDM
.MACRO SR REG,NUM
; .NLIST SRC
.IF GT NUM-7
.IFT
SWAB REG
.REPT NUM-8.
ASR REG
.ENDR
.IFF
.REPT NUM
ASR REG
.ENDR
.ENDC
; .LIST SRC
.ENDM
.MACRO EXOR REG,DESTIN,SCRTCH
.IF NB SCRTCH
.IFT
MOV REG,SCRTCH
BIC DESTIN,SCRTCH
BIC REG,DESTIN
BIS SCRTCH,DESTIN
.IFF
MOV REG,-(SP)
BIC DESTIN,(SP)
BIC REG,DESTIN
BIS (SP)+,DESTIN
.ENDC
.ENDM
;STANDARD PROGRAM ASSIGNMENTS
.IIF NDF STACK,STACK=157776 ;INITIAL STACK POINTER
.IIF NDF CONSOL,CONSOL=100000 ;CONSOLE START ADDRESS
CBIT==1 ;CARRY BIT
NBIT==10 ;NEGATIVE BIT
ZBIT==4 ;ZERO BIT
VBIT==2 ;OVERFLOW BIT
TBIT==20 ;TRAP BIT
;REGISTER DEFINITIONS
R0= %0 ;GENERAL REGISTERS
R1= %1
R2= %2
R3= %3
R4= %4
R5= %5
R6= %6
SP= %6 ;STACK POINTER
PC= %7 ;PROGRAM COUNTER
;PDP11/40 STANDARD TRAP VECTOR ASSIGNMENTS
RESVED==0 ;RESERVED
ERRVEC==4 ;TIME OUT, BUS ERROR
RESVEC==10 ;RESERVED INSTRUCTION
TRTVEC==14 ;BREAK POINT VECTOR
IOTVEC==20 ;IOT TRAP VECTOR
PWRVEC==24 ;POWER FAIL TRAP VECTOR
EMTVEC==30 ;EMT TRAP VECTOR
TRAPVEC==34 ;"TRAP" TRAP VECTOR
TKVEC==60 ;TTY KEYBOARD VECTOR
TPVEC==64 ;TTY PRINTER VECTOR
TA11==260 ;CASSETTE TAPE READER
TC11==214 ;DECTAPE VECTOR
TBITVEC==14
BPTVEC==14
;PDP11/40 STANDARD ADDRESS ASSIGNMENTS
PS=177776 ;CPU STATUS
STKLMT=177774 ;STACK LIMIT
SWR=177570 ;CONSOLE SWITCH REGISTER
TTODBR=177566 ;TTY OUT DBR
TTOCSR=177564 ;TTY OUT CSR
TTIDBR=177562 ;TTY IN DBR
TTICSR=177560 ;TTY IN CSR
XORCR=174200
XORSR=174202
;BIT ASSIGNMENTS
BIT00==1
BIT0==BIT00
BIT01==2
BIT1==BIT01
BIT02==4
BIT2==BIT02
BIT03==10
BIT3==BIT03
BIT04==20
BIT4==BIT04
BIT05==40
BIT5==BIT05
BIT06==100
BIT6==BIT06
BIT07==200
BIT7==BIT07
BIT08==400
BIT8==BIT08
BIT09==1000
BIT9==BIT09
BIT10==2000
BIT11==4000
BIT12==10000
BIT13==20000
BIT14==40000
BIT15==100000
;PRIORITY ASSIGNMENTS
PR0==000
PR1==040
PR2==100
PR3==140
PR4==200
PR5==240
PR6==300
PR7==340
;CHARACTERS USED
MSWCHR==377 ; MONITOR TO "KLDCP" SWITCH CHAR, HACKED BY BREAK
TEXTERM=0 ; TERMINATES TEXT
TAB==11 ; TAB
CNTRLI==11 ; CONTROL-I (TAB)
LF==12 ; LINE FEED
VT==13 ; VERTICAL TAB
FF==14 ; FORM FEED
CR==15 ; CARRIAGE RETURN
BELL==7 ; BELL
BLANK==40 ; BLANK (SPACE)
SPACE==40 ; SPACE
COMMA==54 ; COMMA
SLASH==57 ; SLASH
BKSLH==134 ; BACK SLASH
BKARW==137 ; BACK ARROW
XOFF==023 ; X-OFF (CONTROL S)
XON==021 ; X-ON (CONTROL Q)
CNTRLO==017 ; CONTROL O
CNTRLU==025 ; CONTROL U
CNTRLA==001 ; CONTROL A
CNTRLC==003 ; CONTROL C
CNTRLD==004 ; CONTROL D
CNTRLK==013 ; CONTROL K
CNTRLL==14 ; CONTROL L
CNTRLR==022 ; CONTROL R
CNTRLT==024 ; CONTROL T
CNTRLX==030 ; CONTROL X
CNTRLZ==032 ; CONTROL Z
RUBOUT==177 ; RUB OUT
ALTMOD==33 ; ALTMODE
ETB==27 ; END OF TRANSMISSION BLOCK (CONTROL W)
NULL==026 ; NULL FILLER CHAR
SYN==001 ; COMMUNICATIONS SYNC CHAR (CONTROL A)
;.NLIST
.IF DF DTEASB
;.LIST
.SBTTL DTE20 DEVICE REGISTER AND BIT DEFINITIONS, 4-JUNE-75
DTEADR=174400 ;ADDRESS OF (FIRST) DTE20 DEVICE REGISTER BLOCK
DTESIZ==000040 ;SPACING BETWEEN CONSECUTIVE DTE20'S
DTEMAX==4 ;MAXIMUM NUMBER OF DTE20'S ON ONE PDP-11
DTESZS==5 ;SHIFT TO CONVERT DTE ADDRESS TO DTE #
.IF DF DTEDEF
;OFFSETS FROM THE BASE OF THE DTE20 DEVICE REGISTER BLOCK
;TO SPECIFIC 10/11 INTERFACE RAM LOCATIONS AND REGISTERS.
; THE FIRST 12 REGISTERS ARE NOT INITIALIZED BY "INIT" (BECAUSE THEY ARE IN RAMS)
DLYCNT==00 ;DELAY COUNT (ADDRESS XXXX00)
DEXWD3==02 ;DEPOSIT OR EXAMINE WORD 3 (ADDRESS XXXX02)
DEXWD2==04 ;DEPOSIT OR EXAMINE WORD 2 (ADDRESS XXXX04)
DEXWD1==06 ;DEPOSIT OR EXAMINE WORD 1 (ADDRESS XXXX06)
TENAD1==10 ;10 ADDRESS WORD 1 FOR DEX (ADDRESS XXXX10)
TENAD2==12 ;10 ADDRESS WORD 2 FOR DEX (ADDRESS XXXX12)
TO10BC==14 ;TO10 BYTE COUNT (ADDRESS XXXX14)
TO11BC==16 ;TO11 BYTE COUNT (ADDRESS XXXX16)
TO10AD==20 ;TO10 PDP11 MEMORY ADDRESS (ADDRESS XXXX20)
TO11AD==22 ;TO11 PDP11 MEMORY ADDRESS (ADDRESS XXXX22)
TO10DT==24 ;TO10 PDP11 DATA WORD (ADDRESS XXXX24)
TO11DT==26 ;TO11 PDP11 DATA WORD (ADDRESS XXXX26)
; THE LAST 4 REGISTERS ARE INITIALIZED BY "INIT" (BECAUSE THEY ARE IN FLIP-FLOPS)
DIAG1==30 ;DIAGNOSTIC WORD 1 (ADDRESS XXXX30)
DIAG2==32 ;DIAGNOSTIC WORD 2 (ADDRESS XXXX32)
STATUS==34 ;10/11 INTERFACE STATUS WORD (ADDRESS XXXX34)
DIAG3==36 ;DIAGNOSTIC WORD 3 (ADDRESS XXXX36)
.ENDC
; THE FOLLOWING ARE THE ADDRESSES OF THE DTE20 INTERRUPT VECTORS
DTEIV0==774 ;INTERRUPT VECTOR FOR DTE20 #0
DTEIV1==770 ;INTERRUPT VECTOR FOR DTE20 #1
DTEIV2==764 ;INTERRUPT VECTOR FOR DTE20 #2
DTEIV3==760 ;INTERRUPT VECTOR FOR DTE20 #3
;BIT ASSIGNMENTS FOR 10/11 INTERFACE REGISTERS
;BIT ASSIGNMENTS FOR TENAD1
PHYS==BIT15 ;EXAMINE/DEP PHYSICAL ADDRESS
USEVIR==BIT14!BIT13 ;EX/DP USER VIRTUAL ADDRESS
XUPT==BIT14 ;EX/DP VIA USER PROCESS TABLE
EXVIRT==BIT13 ;EX/DP EXEC VIRTUAL ADDRESS
DEP==BIT12 ;MODE BIT FOR DEPOSIT (0=EXAMINE)
PRTOFF==BIT11 ;PROTECT OFF
XEPT==0 ;EX/DP VIA EXEC PROCESS TABLE
;BIT ASSIGNMENTS FOR TO11BC
INT10==BIT15 ;SET DONE AND INTERRUPT BOTH 10 AND 11
ZSTOP==BIT14 ;STOP ON NULL (ZERO) CHARACTER
BYTE2==BIT13 ;TWO EIGHT BIT BYTES PER WORD
TO11BM==BIT13 ;TO-11 BYTE MODE
;BIT ASSIGNMENTS FOR DIAG1 (WRITE)
DS00==BIT15 ;DIAGNOSTIC STATUS
DS01==BIT14 ; "
DS02==BIT13 ; "
DS03==BIT12 ; "
DS04==BIT11 ; "
DS05==BIT10 ; "
DS06==BIT9 ; "
DFUNC==BIT7 ;DOING DIAGNOSTIC FUNCTION (DFRD,DFWRT,DFXCT)
PULSE==BIT4!BIT5 ;SINGLE PULSE THE 10/11 CLOCK (ALSO SETS
;10/11 DIAGNOSTIC MODE)
DCOMST==BIT0 ;DIAGNOSTIC COMMAND START
DCSRT==BIT0 ;DIAGNOSTIC COMMAND START (NEW NAME FOR DCOMST)
DSEND==BIT2 ;SEND THE EBUS DURING DIAGNOSTIC FUNCTION
DIKL10==BIT3 ;KL10 DIAGNOSTIC MODE
D1011==BIT5 ;10/11 INTERFACE DIAGNOSTIC MODE
;BIT ASSIGNMENTS FOR DIAG1 (READ)
TO10==BIT7 ;INTERFACE MAJOR STATE = TO10 TRANSFER
DEX==BIT8 ; " " " = DEPOSIT OR EXAMINE
TO11==BIT6 ; " " " = TO11 TRANSFER
VEC04==BIT4 ;VECTOR INTERRUPT ADDRESS BIT 4
VEC03==BIT3 ; " " " " 3
VEC02==BIT2 ; " " " " 2
HALTLP==BIT9 ;EBOX IS IN HALT LOOP
KLRUN==BIT10 ;RUN FLOP, KL IS EXECUTING INSTRUCTIONS
ERRSTP==BIT11 ;EBOX CLOCK STOPPED DUE TO ERROR
;BIT ASSIGNMENTS FOR DIAG2 (WRITE)
EDONES==BIT14 ;SET EBUS DONE
DRESET==BIT6 ;PERFORM DIAGNOSTIC CLEAR
;BIT ASSIGNMENTS FOR DIAG2 (READ)
;BIT ASSIGNMENTS FOR DIAG3 (WRITE)
SCD==BIT5 ;SHIFT CAPTURED DATA (PARITY ERROR DATA)
CDD==BIT4 ;CLEAR DUPE & DURE ERROR FLAGS
WEP==BIT3 ;WRITE EVEN (BAD) PARITY
CNUPE==BIT1 ;CLEAR NUPE
TO10BM==BIT0 ;TO-10 TRANSFER BYTES FROM THE 11
;BIT ASSIGNMENTS FOR DIAG3 (READ)
RFMAD0==BIT15 ;RFM ADDRESS BIT 0
RFMAD1==BIT14 ; " " " 1
RFMAD2==BIT13 ; " " " 2
RFMAD3==BIT12 ; " " " 3
;BIT ASSIGNMENTS FOR DIAG3 (READ)
SWSLFT==BIT15 ;SWAP SELECT LEFT
CAB08==BIT14 ;CAPTURED UNIBUS ADDRESS BIT 08
DUPE==BIT4 ;DATO UNIBUS PARITY ERROR
DURE==BIT2 ;DATO UNIBUS RECIEVER ERROR
NUPE==BIT1 ;NPR UNIBUS PARITY ERROR
UPECD==BIT13!BIT12!BIT11!BIT10!BIT9 ;UNIBUS PARITY ERR, CAPTURED DATA
;BIT ASSIGNMENTS FOR STATUS (WRITE)
DON10S==BIT15 ;SET TO10 DONE
DON10C==BIT14 ;CLEAR TO10 DONE
ERR10S==BIT13 ;SET TO10 ERROR
ERR10C==BIT12 ;CLEAR TO10 ERROR
INT11S==BIT11 ;SET 10 REQ INTERRUPT (INTERRUPTS 11)
INT11C==BIT10 ;CLEAR 10 REQ INTERRUPT (REMOVES INTERRUPT TO 11)
PERCLR==BIT9 ;CLEAR -11 MEMORY PARITY ERROR
INT10S==BIT8 ;SET REQUEST 10 INTERRUPT (INTERRUPTS 10)
DON11S==BIT7 ;SET TO11 DONE
DON11C==BIT6 ;CLEAR TO11 DONE
INTRON==BIT5 ;ENABLE DTE20 TO INTERRUPT THE 11
EBUSPC==BIT4 ;CLEAR EBUS PARITY ERROR
INTROF==BIT3 ;DISABLE THE DTE20 11-INTERRUPTS
EBUSPS==BIT2 ;SET EBUS PARITY ERROR
ERR11S==BIT1 ;SET TO11 ERROR
ERR11C==BIT0 ;CLEAR TO11 ERROR
;BIT ASSIGNMENTS FOR STATUS (READ)
TO10DN==BIT15 ;TO10 DONE
TO10ER==BIT13 ;TO 10 ERROR (NPR TIMEOUT OR BUS ERROR)
RAMIS0==BIT12 ;DATA OUT OF DTE RAM IS ALL 0S (RFM=0)
TO11DB==BIT11 ;10 REQUESTING 11 INTERRUPT (DOORBELL FROM 10)
DXWRD1==BIT10 ;DEPOSIT OR EXAMINE WORD ONE
D11MPE==BIT9 ;-11 MEMORY PARITY ERROR
TO10DB==BIT8 ;REQUEST 10 INTERRUPT (DOORBELL FROM 11)
TO11DN==BIT7 ;TO11 DONE
EBSEL==BIT6 ;E BUFFER SELECT
NULSTP==BIT5 ;NULL STOP
BPARER==BIT4 ;EBUS PARITY ERROR
RM==BIT3 ;THIS DTE20 IN RESTRICTED MODE
DEXDON==BIT2 ;DEPOSIT OR EXAMINE DONE
TO11ER==BIT1 ;TO 11 ERROR (NPR TIMEOUT OR BUS ERROR)
INTSON==BIT0 ;INTERRUPTS ON, DTE20 ENABLED TO INTERRUPT 11
;CLOCK CONTROL FUNCTIONS
STPCLK==000 ; STOP CLOCK
STRCLK==001 ; START CLOCK
SSCLK==002 ; SINGLE STEP THE MBOX CLOCK
SECLK==003 ; SINGLE STEP EBOX CLOCK
CECLK==004 ; CONDITIONAL EBOX CLOCK
CLRMR==006 ; CLEAR MR RESET
SETMR==007 ; SET MR RESET
BRCLK==005 ; BURST THE CLOCK
;CLOCK LOAD FUNCTIONS
LDBRR==42 ; LOAD BURST REGISTER RIGHT HALF
LDBRL==43 ; LOAD BURST REGISTER LEFT HALF
LDSEL==44 ; LOAD SOURCE AND RATE SELECTS
LDDIS==45 ; LOAD EBOX CLOCK DISTRIBUTION REGISTER
LDCHK1==46 ; LOAD PARITY CHECK REGISTER (ENABLE BAD PARITY STOP)
LDCHK2==47 ; LOAD EBOX INTERNAL CHECK REGISTER
;DRAM FUNCTIONS
LDRAM1==60 ; LOAD A & B FIELDS EVEN
LDRAM2==61 ; LOAD A & B FIELDS ODD
LDRAM3==62 ; LOAD COMMON J1-J4
LDRJEV==63 ; LOAD PARITY & J8-J10 EVEN
LDRJOD==64 ; LOAD PARITY & J8-J10 ODD
DRAMAB==133 ; READ D-RAM A & B
DRJ710==135 ; READ D-RAM J7-J10
DRJ1.4==134 ; READ D-RAM J1-J4
;IR DRAM CONTROL
DISIOJ==65 ; DISABLE 7XX & JRST=254
DISACF==66 ; DISABLE THE IR AC'C
ENIOJA==67 ; ENABLE 7XX, JRST=254 & IR AC'S
;CRAM FUNCTIONS
LCRAM1==57 ; LOAD C-RAM DATA
LCRAM2==56
LCRAM3==55
LCRAM4==54
LCRAM5==53
LCRDAL==52 ; LOAD CRAM ADDRESS LEFT (00-04)
LCRDAR==51 ; LOAD CRAM ADDRESS RIGHT (05-10)
RCRAM1==147 ; READ C-RAM DATA
RCRAM2==146
RCRAM3==145
RCRAM4==144
RCSPEC==141 ; READ C-RAM SPEC
;MISC CONTROL FUNCTIONS
IRLOAD==14 ; LOAD THE IR FROM AD
DRLTCH==15 ; LOAD D-RAM LATCHES
CLRRUN==10 ; CLEAR RUN FLIP-FLOP
SETRUN==11 ; SET RUN FLIP-FLOP
CONBUT==12 ; THE CONTINUE BUTTON
LDAR==77 ; LOAD THE AR
;MBOX CONTROL FUNCTIONS
LDMBXA==71 ; LOAD MEMORY TO CACHE SELECTOR
LDCHAN==70 ; LOAD CHANNEL DIAGNOSTIC CONDITIONS
;PI CONTROL FUNCTIONS
READ0==100 ; PI (READ STATUS 0)
READ1==101 ; PI (READ STATUS 1)
READ2==102 ; PI (READ STATUS 2)
READ3==103 ; PI (READ STATUS 3)
;DATA PATH CONTROL FUNCTIONS
DPAR==120 ; AR
DPBR==121 ; BR
DPMQ==122 ; MQ
DPFM==123 ; FM
DPFMA==114 ; FM ADR
DPBRX==124 ; BRX
DPARX==125 ; ARX
DPADX==126 ; ADX
DPAD==127 ; AD
DPPC==153 ; PC
DPVMA==157 ; VMA
DPVMHD==157 ; VMA HELD
DPADB==153 ; ADDRESS BREAK
DPERG==167 ; E-BUS REGISTER
DPFE==132 ; FE 05-09
DPFE1==133 ; FE 00-04
DPSC==130 ; SC 05-09
DPSC1==131 ; SC 00-04
.SBTTL KL10 EBOX MACRO DEFINITIONS, 4-JUNE-75
;MACRO TO TURN 36 BIT WORDS INTO 5 UPSIDE DOWN BYTES
.MACRO WD36 A,B,C
.NLIST SRC
.BYTE <377&C>,<</400>!<*20>>,</20>
.BYTE ,</400>
.LIST SRC
.ENDM
;PDP10 CPU INSTRUCTION MACRO. TAKES 5 ARGUMENTS AS IN NORMAL
;10 CODE. 5 FIELDS MUST BE PRESENT (4 FIELD SEPARATORS)
;BUT THE AD,AC,I, AND XR FIELDS MAY BE LEFT BLANK AND IF SO,
;WILL ASSEMBLE AS ZERO. THE OP FIELD MUST NOT BE LEFT BLANK.
.MACRO I10 OP,CAC,CI,CAD,CXR
ADH==0
ADL==0
.IF NB CAD
.IRPC AD1,CAD
.IIF GE ,ADH==ADL/10000
ADL==10*+AD1
.ENDM
.ENDC
.IIF B CAC,AC==0
.IIF NB CAC,AC==CAC
.IIF B CI,I==0
.IIF NB CI,I==CI
.IIF B CXR,XR==0
.IIF NB CXR,XR==CXR
.NLIST SRC
.BYTE ,<!>,>+>
.BYTE >,
.LIST SRC
.ENDM I10
CRMSIZ==2777 ;# C-RAM WORDS
;MACRO TO GENERATE A RIGHT JUSTIFIED 3-BYTE VALUE
;FOR A 22-BIT ARGUMENT
.MACRO WD22 AD
ADH==0
ADL==0
.IRPC AD1,AD
.IIF GE ,ADH==<10*ADH>+
ADL==10*+AD1
.ENDM
.NLIST SRC
.BYTE ,<!>,
.LIST SRC
.ENDM WD22
;PDP10 I/O INSTRUCTION MACRO. TAKES 5 ARGUMENT AS NOTED ABOVE
;IN THE DESCRIPTION OF THE I10 MACRO. THE 8 I/O OP CODES ARE
;DEFINED AS ARE DEVICE CODES APR, PI, PAG, AND CCA.
.MACRO IO10 OP,DV,CI,AD,CXR
.IIF B CI,I==0
.IIF NB CI,I==CI
.IIF B CXR,XR==0
.IIF NB CXR,XR==CXR
BLKO==2
DATAO==3
BLKI==0
DATAI==1
CONO==4
CONI==5
CONSZ==6
CONSO==7
APR==0
PI==4
PAG==10
CCA==14
ADH==0
ADL==0
.IRPC AD1,AD
.IIF GE ,ADH==ADL/10000
ADL==10*+AD1
.ENDM
.NLIST SRC
.BYTE ,<!>,>+>
.BYTE >,
.LIST SRC
.ENDM IO10
;THIS IS A MACRO TO WAIT FOR A DONE FLAG
.MACRO WFZERO BITSEL
MOV #2500.,-(SP) ;SET TIMEOUT CNT
91$: BIT #BITSEL,@.DIAG1 ;TEST BIT
BEQ 92$ ;LEAVE IF BIT ZERO(OK)
DEC (SP) ;DECREMENT CNT
BNE 91$ ;CONTINUE LOOP
TST RPTFLG ;OTHERWISE TIME OUT
BNE 92$
JSR R1,$DFTIM
92$: TST (SP)+ ;RESET STACK & CONTINUE
.ENDM
;THIS MACRO IS A WAIT FOR FLAG MACRO.
;IT WAITS FOR A TEST BIT TO GO TO ONE
;FROM A ZERO
.MACRO WFONE BITSEL
MOV #2500.,-(SP) ;SET TIMEOUT CNT
93$: BIT #BITSEL,@.STDTE ;TEST BIT
BNE 94$ ;LEAVE IF NOW A ONE(OK)
DEC (SP) ;DECREMENT CNT
BNE 93$ ;CONTINUE LOOP
TST RPTFLG ;OTHERWISE TIME OUT
BNE 94$
JSR R1,$DFTIM
94$: TST (SP)+ ;RESET STACK
.ENDM
.NLIST
.ENDC ; DTEASB
.LIST
.NLIST
.IF DF DTEBBD
.LIST
.SBTTL *BBD* DTE20 DEVICE REGISTER AND BIT DEFINITIONS, 2-JAN-75
DTEADR=164000 ;ADDRESS OF (FIRST) DTE20 DEVICE REGISTER BLOCK
DTESIZ==000040 ;SPACING BETWEEN CONSECUTIVE DTE20'S
DTEMAX==4 ;MAXIMUM NUMBER OF DTE20'S ON ONE PDP-11
DTESZS==5 ;SHIFT TO CONVERT DTE ADDRESS TO DTE #
.IF DF DTEDEF
;OFFSETS FROM THE BASE OF THE DTE20 DEVICE REGISTER BLOCK
;TO SPECIFIC 10/11 INTERFACE RAM LOCATIONS AND REGISTERS.
; THE FIRST 12 REGISTERS ARE NOT INITIALIZED BY "INIT" (BECAUSE THEY ARE IN RAMS)
DLYCNT==00 ;DELAY COUNT (ADDRESS XXXX00)
DEXWD1==02 ;DEPOSIT OR EXAMINE WORD 1 (ADDRESS XXXX02)
DEXWD2==04 ;DEPOSIT OR EXAMINE WORD 2 (ADDRESS XXXX04)
DEXWD3==06 ;DEPOSIT OR EXAMINE WORD 3 (ADDRESS XXXX06)
TENAD1==10 ;10 ADDRESS WORD 1 FOR DEX (ADDRESS XXXX10)
TENAD2==12 ;10 ADDRESS WORD 2 FOR DEX (ADDRESS XXXX12)
TO10BC==14 ;TO10 BYTE COUNT (ADDRESS XXXX14)
TO11BC==16 ;TO11 BYTE COUNT (ADDRESS XXXX16)
TO10AD==20 ;TO10 PDP11 MEMORY ADDRESS (ADDRESS XXXX20)
TO11AD==22 ;TO11 PDP11 MEMORY ADDRESS (ADDRESS XXXX22)
TO10DT==24 ;TO10 PDP11 DATA WORD (ADDRESS XXXX24)
TO11DT==26 ;TO11 PDP11 DATA WORD (ADDRESS XXXX26)
; THE LAST 4 REGISTERS ARE INITIALIZED BY "INIT" (BECAUSE THEY ARE IN FLIP-FLOPS)
DIAG1==30 ;DIAGNOSTIC WORD 1 (ADDRESS XXXX30)
DIAG2==32 ;DIAGNOSTIC WORD 2 (ADDRESS XXXX32)
STATUS==34 ;10/11 INTERFACE STATUS WORD (ADDRESS XXXX34)
DIAG3==36 ;DIAGNOSTIC WORD 3 (ADDRESS XXXX36)
.ENDC
; THE FOLLOWING ARE THE ADDRESSES OF THE DTE20 INTERRUPT VECTORS
DTEIV0==170 ;INTERRUPT VECTOR FOR DTE20 #0
DTEIV1==174 ;INTERRUPT VECTOR FOR DTE20 #1
DTEIV2==270 ;INTERRUPT VECTOR FOR DTE20 #2
DTEIV3==274 ;INTERRUPT VECTOR FOR DTE20 #3
; THE FOLLOWING MACRO (DTEVEC) DYNAMICLY COMPUTES THE INTERRUPT
; VECTOR ADDRESS ASSOCIATED WITH A PARTICULAR DTE20.
; THE FIRST ARGUMENT (DTEDRB) IS A REGISTER OR MEMORY LOCATION
; WHICH CONTAINS THE BASE ADDRESS OF THE DEVICE REGISTER BLOCK
; FOR A PARTICULAR DTE20.
; THE SECOND ARGUMENT (DTEIVB) IS A REGISTER OR MEMORY LOCATION
; INTO WHICH THIS MACRO WILL STORE THE BASE ADDRESS OF THE INTERRUPT
; VECTOR ASSOCIATED WITH THE SAME DTE20.
.MACRO DTEVEC DTEDRB,DTEIVB,?LABEL
MOVB DTEDRB,DTEIVB
.NTYPE DTE$T0,DTEIVB
.IF NE DTE$T0&70 ;IS "DTEIVB" A REGISTER?
.IFT
CLRB DTEIVB+1
.ENDC
ADD #DTEIV0,DTEIVB ;THIS MACRO DEPENDS ON THE BIT
BIT #DTESIZ,DTEIVB ;PATTERNS IN THE DEVICE REGISTER
BNE LABEL ;ADDRESSES AND INTERRUPT VECTOR
SUB #DTESIZ+DTEIV0-DTEIV1,DTEIVB ;ADDRESSES.
LABEL:
.ENDM DTEVEC
;BIT ASSIGNMENTS FOR 10/11 INTERFACE REGISTERS
;BIT ASSIGNMENTS FOR TENAD1
DEP==BIT15 ;MODE BIT FOR DEPOSIT (0=EXAMINE)
F1==BIT7 ;HIGH ORDER BIT OF FAST AC BLOCK
F2==BIT6 ;LOW " " " " " "
;BIT ASSIGNMENTS FOR TO10BC
INT11==BIT15 ;SET DONE AND INTERRUPT BOTH 10 AND 11
;BIT ASSIGNMENTS FOR TO11BC
INT10==BIT15 ;SET DONE AND INTERRUPT BOTH 10 AND 11
ZSTOP==BIT14 ;STOP ON NULL (ZERO) CHARACTER
;BIT ASSIGNMENTS FOR TO10AD AND TO11AD
BYTE2==BIT0 ;TWO EIGHT-BIT BYTES PER WORD
;BIT ASSIGNMENTS FOR DIAG1 (WRITE)
DPULSE==BIT7 ;PULSE THE KL10 CLOCK
PULSE==BIT4!BIT0 ;SINGLE PULSE THE 10/11 CLOCK (ALSO SETS
;10/11 DIAGNOSTIC MODE)
DBUSEN==BIT3 ;DIAGNOSTIC BUS ENABLE
DCSRT==BIT3 ;DIAGNOSTIC COMMAND START (NEW NAME FOR DBUSEN)
DSEND==BIT2 ;SEND THE EBUS DURING DIAGNOSTIC FUNCTION
DIKL10==BIT1 ;KL10 DIAGNOSTIC MODE
D1011==BIT0 ;10/11 INTERFACE DIAGNOSTIC MODE
;BIT ASSIGNMENTS FOR DIAG1 (READ)
TO10==BIT7 ;INTERFACE MAJOR STATE == TO10 TRANSFER
DEX==BIT6 ; " " " == DEPOSIT OR EXAMINE
TO11==BIT5 ; " " " == TO11 TRANSFER
VEC04==BIT4 ;VECTOR INTERRUPT ADDRESS BIT 4
VEC03==BIT3 ; " " " " 3
VEC02==BIT2 ; " " " " 2
;BIT ASSIGNMENTS FOR DIAG2 (WRITE)
EDONES==BIT14 ;SET EBUS DONE
STHOLD==BIT7 ;STAY IN CURRENT MAJOR STATE
CLEAR==BIT6 ;PERFORM DIAGNOSTIC CLEAR
;BIT ASSIGNMENTS FOR DIAG2 (READ)
;BIT ASSIGNMENTS FOR DIAG3 (READ)
RAMIS0==BIT7 ;RFM==0 (ALL ZEROES COMING OUT OF RAM)
RFMAD0==BIT1 ;RFM ADDRESS BIT 0
RFMAD1==BIT8 ; " " " 1
RFMAD2==BIT9 ; " " " 2
RFMAD3==BIT10 ; " " " 3
;BIT ASSIGNMENTS FOR STATUS (WRITE)
DON10S==BIT15 ;SET TO10 DONE
DON10C==BIT14 ;CLEAR TO10 DONE
ERR10S==BIT13 ;SET TO10 ERROR
ERR10C==BIT12 ;CLEAR TO10 ERROR
INT11S==BIT11 ;SET 10 REQ INTERRUPT (INTERRUPTS 11)
INT11C==BIT10 ;CLEAR 10 REQ INTERRUPT (REMOVES INTERRUPT TO 11)
PERCLR==BIT9 ;CLEAR -11 MEMORY PARITY ERROR
INT10S==BIT8 ;SET REQUEST 10 INTERRUPT (INTERRUPTS 10)
DON11S==BIT7 ;SET TO11 DONE
DON11C==BIT6 ;CLEAR TO11 DONE
ERR11S==BIT1 ;SET TO11 ERROR
ERR11C==BIT0 ;CLEAR TO11 ERROR
;BIT ASSIGNMENTS FOR STATUS (READ)
TO10DN==BIT15 ;TO10 DONE
PI10OF==BIT14 ;THIS DTE20 IS NOT TRYING TO INTERRUPT THE -10
TO10ER==BIT13 ;TO 10 ERROR (NPR TIMEOUT OR BUS ERROR)
INTR11==BIT12 ;11 INTERRUPT PENDING
DOOR10==BIT11 ;10 REQUESTING 11 INTERRUPT (DOORBELL FROM 10)
DXWRD1==BIT10 ;DEPOSIT OR EXAMINE WORD ONE
PARERR==BIT9 ;-11 MEMORY PARITY ERROR
DOOR11==BIT8 ;REQUEST 10 INTERRUPT (DOORBELL FROM 11)
TO11DN==BIT7 ;TO11 DONE
EBSEL==BIT6 ;E BUFFER SELECT
NULSTP==BIT5 ;NULL STOP
DEAD10==BIT4 ;KL10 STOPPED
DBUSON==BIT3 ;DIAGNOSTIC BUS ENABLED
DEXDON==BIT2 ;DEPOSIT OR EXAMINE DONE
TO11ER==BIT1 ;TO 11 ERROR (NPR TIMEOUT OR BUS ERROR)
; FUNCTION SELECT CODES
STPCLK==010 ; STOP CLOCK
STRCLK==011 ; START CLOCK
SSCLK==014 ; SINGLE STEP THE CLOCK
CLRMR==016 ; CLEAR MR RESET
SETMR==017 ; SET MR RESET
BRCLK==015 ; BURST THE CLOCK
LDCLK==012 ; LOAD CLOCK BURST COUNTER & RATE
CLKCND==101 ; READ CLOCK CONDITION
LDRAM1==030 ; LOAD D-RAM DATA
LDRAM2==031
LDRAM3==032
RDRAMA==131 ; READ D-RAM ADDRESS
RDRAM1==132 ; READ D-RAM DATA
RDRAM2==133
DRAMAB==132 ; D-RAM A & B
DRAMJ==133 ; D-RAM J
LCRAM1==040 ; LOAD C-RAM DATA
LCRAM2==041
LCRAM3==042
LCRAM4==043
LCRAM5==044
LCRAMA==047 ; LOAD C-RAM ADDRESS
RCRAM1==140 ; READ C-RAM DATA AND ADDRESS
RCRAM2==141 ; READ C-RAM DATA
RCRAM3==142
RCRAM4==143
RELCTR==000 ; RELINQUISH CONTROL OF THE TRANSLATOR
DIAGRD==001 ; SET TRANSLATOR IN 10 TO 11 DIRECTION
DIAGLD==002 ; SET TRANSLATOR IN 11 TO 10 DIRECTION
IRLOAD==003 ; ENABLE LOADING OF THE AR & IR REGISTERS
DRLTCH==005 ; LOAD D-RAM LATCHES
CLRRUN==007 ; CLEAR RUN FLIP-FLOP
SETRUN==006 ; SET RUN FLIP-FLOP
CONBUT==004 ; THE CONTINUE BUTTON
READ0==110 ; PI (READ STATUS 0)
READ1==111 ; PI (READ STATUS 1)
READ2==112 ; PI (READ STATUS 2)
READ3==113 ; PI (READ STATUS 3)
DPAR==120 ; AR (DATA PATH)
DPBR==121 ; BR
DPMQ==122 ; MQ
DPFM==123 ; FM
DPBRX==124 ; BRX
DPARX==125 ; ARX
DPADX==126 ; ADX
DPAD==127 ; AD
DPFE==133 ; FE
DPSC==131 ; SC
DPERG==157 ; E-BUS REGISTER
RDPCH==130 ; READ PC 18-26
RDPCL==131 ; READ PC 27-35
RDVMAH==132 ; READ VMA 18-26
RDVMAL==133 ; READ VMA 27-35
MCHLTLP==42 ; U CODE HALT LOOP ADDRESS
.SBTTL *BBD* KL10 EBOX MACRO DEFINITIONS, 4-MAR-75
;MACRO TO TURN 36 BIT WORDS INTO 5 UPSIDE DOWN BYTES
.MACRO WD36 A,B,C
.NLIST SRC
.BYTE <377&C>,<</400>!<*20>>,</20>
.BYTE ,</400>
.LIST SRC
.ENDM
;PDP10 CPU INSTRUCTION MACRO. TAKES 5 ARGUMENTS AS IN NORMAL
;10 CODE. 5 FIELDS MUST BE PRESENT (4 FIELD SEPARATORS)
;BUT THE AD,AC,I, AND XR FIELDS MAY BE LEFT BLANK AND IF SO,
;WILL ASSEMBLE AS ZERO. THE OP FIELD MUST NOT BE LEFT BLANK.
.MACRO I10 OP,CAC,CI,CAD,CXR
ADH==0
ADL==0
.IF NB CAD
.IRPC AD1,CAD
.IIF GE ,ADH==ADL/10000
ADL==10*+AD1
.ENDM
.ENDC
.IIF B CAC,AC==0
.IIF NB CAC,AC==CAC
.IIF B CI,I==0
.IIF NB CI,I==CI
.IIF B CXR,XR==0
.IIF NB CXR,XR==CXR
.NLIST SRC
.BYTE ,<!>,>+>
.BYTE >,
.LIST SRC
.ENDM I10
;MACRO TO GENERATE A RIGHT JUSTIFIED 3-BYTE VALUE
;FOR A 22-BIT ARGUMENT
.MACRO WD22 AD
ADH==0
ADL==0
.IRPC AD1,AD
.IIF GE ,ADH==<10*ADH>+
ADL==10*+AD1
.ENDM
.NLIST SRC
.BYTE ,<!>,
.LIST SRC
.ENDM WD22
;PDP10 I/O INSTRUCTION MACRO. TAKES 5 ARGUMENT AS NOTED ABOVE
;IN THE DESCRIPTION OF THE I10 MACRO. THE 8 I/O OP CODES ARE
;DEFINED AS ARE DEVICE CODES APR, PI, PAG, AND CCA.
.MACRO IO10 OP,DV,CI,AD,CXR
.IIF B CI,I==0
.IIF NB CI,I==CI
.IIF B CXR,XR==0
.IIF NB CXR,XR==CXR
BLKO==2
DATAO==3
BLKI==0
DATAI==1
CONO==4
CONI==5
CONSZ==6
CONSO==7
APR==0
PI==4
PAG==10
CCA==14
ADH==0
ADL==0
.IRPC AD1,AD
.IIF GE ,ADH==ADL/10000
ADL==10*+AD1
.ENDM
.NLIST SRC
.BYTE ,<!>,>+>
.BYTE >,
.LIST SRC
.ENDM IO10
;THIS IS A MACRO TO WAIT FOR A DONE FLAG
.MACRO WFZERO BITSEL
MOV #2500.,-(SP) ;SET TIMEOUT CNT
91$: BIT #BITSEL,@.DIAG1 ;TEST BIT
BEQ 92$ ;LEAVE IF BIT ZERO(OK)
DEC (SP) ;DECREMENT CNT
BNE 91$ ;CONTINUE LOOP
TST RPTFLG ;OTHERWISE TIME OUT
BNE 92$
JSR R1,$DFTIM
92$: TST (SP)+ ;RESET STACK & CONTINUE
.ENDM
;THIS MACRO IS A WAIT FOR FLAG MACRO.
;IT WAITS FOR A TEST BIT TO GO TO ONE
;FROM A ZERO
.MACRO WFONE BITSEL
MOV #2500.,-(SP) ;SET TIMEOUT CNT
93$: BIT #BITSEL,@.STDTE ;TEST BIT
BNE 94$ ;LEAVE IF NOW A ONE(OK)
DEC (SP) ;DECREMENT CNT
BNE 93$ ;CONTINUE LOOP
TST RPTFLG ;OTHERWISE TIME OUT
BNE 94$
JSR R1,$DFTIM
94$: TST (SP)+ ;RESET STACK
.ENDM
.NLIST
.ENDC ; DTEBBD
.LIST
.NLIST
.IF DF DVASB
.LIST
.SBTTL DEVICE SYMBOL DEFINITIONS, 4-JUNE-75
; PRIORITY LEVELS FOR SERVICE ROUTINES.
TPILEV==PR6 ; TERMINAL PRIORITY LEVEL
NXMPIL==PR7 ; "NON-X-MEM" PRIORITY LEVEL
DHRPS==TPILEV ; DH11 RECEIVER PRIORITY
DHTPS==DHRPS ; DH11 TRANSMITTER
DLRPS==DHRPS ; DL11
DLTPS==DLRPS
KWLPS==DHRPS ; KW11 PRIORITY LEVEL
NXMPS==NXMPIL ; "NON-X-MEM" PRIORITY LEVEL
; BIT DEFINITIONS FOR THE PARAMETER WORD.
PDHDNS==11 ; DH11 DEVICE NUMBER SHIFT
PDHDNM==7000 ; DH11 DEVICE NUMBER MASK
PDHLNS==4 ; DH11 LINE NUMBER SHIFT
PDHLNM==360 ; DH11 LINE NUMBER MASK
PDHLSS==0 ; DH11 LINE SPEED SHIFT
PDHLSM==17 ; DH11 LINE SPEED MASK
PDLFCS==PDHLNS ; DL11 FILLER CLASS SHIFT
PDLFCM==PDHLNS ; DL11 FILLER CLASS MASK
; OTHER DEVICES.
DP11BA==174770 ; DP11 DEVICE REGISTERS BASE ADDRESS
DP11RS==10 ; DP11 DEVICE REGISTER SIZE
DP11VS==10 ; DP11 INTERRUPT VECTOR SIZE
DM11BA==170500 ; DM11 DEVICE REGISTER BASE ADDRESS
DM11RS==10 ; DM11 DEVICE REGISTER SIZE
DM11VS==4 ; DM11 INTERRUPT VECTOR SIZE
DR11BA==167770 ; DR11 DEVICE REGISTER BASE ADDRESS
DR11RS==10 ; DR11 DEVICE REGISTER SIZE
DR11VS==10 ; DR11 INTERRUPT VECTOR SIZE
.NLIST
.ENDC ;DVASB
.LIST
.NLIST
.IF DF KWASB
.LIST
.SBTTL KW11 DEVICE REGISTERS AND BIT DEFINITIONS, 4-JUNE-75
KWLIV==100 ; VECTOR ADDRESS
KWLKS=177546 ; LINE CLOCK STATUS DEVICE ADDRESS
KWLKE==100 ; LINE CLOCK INTERRUPT ENABLE BIT
.SBTTL MM11 DEVICE REGISTERS AND BIT ASSIGNMENTS, 4-JUNE-75
MMLPIV==114 ;VECTOR ADDRESS
MMLPBA=172100 ;1ST MM11-LP DEVICE ADDRESS
MMLPEA=172136 ;LAST MM11-LP DEVICE ADDRESS
MMERRF==BIT15 ;ERROR FLAG
MMADDM==7740 ;ADDRESS MASK
MMADDS==5 ;ADDRESS SHIFT
MMWWP==BIT2 ;WRITE WRONG PARITY
MMPIE==BIT0 ;PARITY INTERRUPT ENABLE
.NLIST
.ENDC ;KWASB
.LIST
.NLIST
.IF DF DLASB
.LIST
.SBTTL DL11 DEVICE REGISTERS AND BIT DEFINITIONS, 4-JUNE-75
DLRIV==60 ; RECEIVER VECTOR ADDRESS
DLTIV==DLRIV+4 ; TRANSMITTER VECTOR ADDRESS
DLBA=177560 ; BASE FOR DEVICE ADDRESSES
DLRCSR==0 ; RECEIVER STATUS REGISTER
DLRBUF==2 ; RECEIVER BUFFER REGISTER
DLXCSR==4 ; TRANSMITTER STATUS REGISTER
DLXBUF==6 ; TRANSMITTER BUFFER REGISTER
; BIT DEFINITIONS FOR "DLRCSR"- RECEIVER CONTROL STATUS REGISTER.
DLDSC==BIT15 ; DATA STATUS CHANGE
DLRI==BIT14 ; RING INDICATOR
DLCTS==BIT13 ; CLEAR TO SEND
DLCD==BIT12 ; CARRIER DETECT
DLRA==BIT11 ; RECEIVER ACTIVE
DLSRD==BIT10 ; SECONDARY RECEIVED DATA
DLRD==BIT7 ; RECEIVER DONE
DLRIE==BIT6 ; RECEIVER INTERRUPT ENABLE
DLDIE==BIT5 ; DATA SET INTERRUPT ENABLE
DLSTD==BIT3 ; SECONDARY TRANSMITTED DATA
DLRTS==BIT2 ; REQUEST TO SEND
DLDTR==BIT1 ; DATA TERMINAL READY
DLRE==BIT0 ; READER ENABLE
; BIT DEFINITIONS FOR "DLRBUF"- RECEIVER BUFFER.
DLERR==BIT15 ; ERROR
DLORE==BIT14 ; OVERRUN ERROR
DLFE==BIT13 ; FRAMING ERROR
DLRDPE==BIT12 ; RECEIVED DATA PARITY ERROR
DLRDS==0 ; RECEIVED DATA SHIFT
DLRDM==377 ; RECEIVED DATA MASK
; BIT DEFINITIONS FOR "DLXCSR"- TRANSMITTER CONTROL STATUS REGISTER.
DLTR==BIT7 ; TRANSMITTER READY
DLTIE==BIT6 ; TRANSMITTER INTERRUPT ENABLE
DLMAIN==BIT2 ; MAINTENANCE
DLBRK==BIT0 ; BREAK
; BIT DEFINITIONS FOR "DLXBUF"- TRANSMITTER BUFFER.
DLTDS==0 ; TRANSMITTER DATA SHIFT
DLTDM==377 ; TRANSMITTER DATA MASK
.NLIST
.ENDC ;DLASB
.LIST
.NLIST
.IF DF DHASB
.LIST
.SBTTL DH11 DEVICE REGISTERS AND BIT DEFINITIONS, 4-JUNE-75
DHIVBA==300 ; INTERRUPT VECTOR BASE ADDRESS
DHRIV==0 ; RECEIVER VECTOR ADDRESS
DHTIV==DHRIV+4 ; TRANSMITTER VECTOR ADDRESS
DHBA==160020 ; BASE FOR DEVICE ADDRESSES
DHSCR==0 ; SYSTEM CONTROL REGISTER
DHNRCR==2 ; NEXT RECEIVER CHARACTER REGISTER
DHLPR==4 ; LINE PARAMETER REGISTER
DHCAR==6 ; CURRENT ADDRESS REGISTER
DHBCR==10 ; BYTE COUNT REGISTER
DHBAR==12 ; TRANSMIT BUFFER ACTIVE REGISTER
DHTBR==14 ; TRANSMIT BREAK REGISTER
DHSSR==16 ; SILO STATUS REGISTER
; BIT DEFINITIONS FOR "DHSCR"- STATUS CONTROL REGISTER.
DHTI==BIT15 ; TRANSMITTER INTERRUPT
DHSI==BIT14 ; STORAGE INTERRUPT
DHTNIE==BIT13 ; TRANSMITTER AND NON-X-MEM INTERRUPT ENABLE
DHSIE==BIT12 ; STORAGE INTERRUPT ENABLE
DHMC==BIT11 ; MASTER CLEAR
DHNXM==BIT10 ; NON-X-MEM
DHMAIN==BIT9 ; MAINTENANCE
DHCNXM==BIT8 ; CLEAR NON-X-MEM BIT
DHRI==BIT7 ; RECEIVER INTERRUPT
DHRIE==BIT6 ; RECEIVER INTERRUPT ENABLE
DHMES==4 ; MEMORY EXTENSION SHIFT
DHMEM==60 ; MEMORY EXTENSION MASK
DHLSS==0 ; LINE SELECTION SHIFT
DHLSM==17 ; LINE SELECTION MASK
; BIT DEFINITIONS FOR "DHNRCR"- NEXT RECEIVER CHARACTER REGISTER.
DHDP==BIT15 ; DATA PRESENT
DHORE==BIT14 ; OVERRUN ERROR
DHFE==BIT13 ; FRAMING ERROR
DHRDPE==BIT12 ; RECEIVER DATA PARITY ERROR
DHRLNS==10 ; RECEIVER LINE NUMBER SHIFT
DHRLNM==7400 ; RECEIVER LINE NUMBER MASK
DHRDS==0 ; RECEIVER DATA SHIFT
DHRDM==377 ; RECEIVER DATA MASK
; BIT DEFINITIONS FOR "DHLPR"- LINE PARAMETER REGISTER.
DHAEE==BIT15 ; AUTO-ECHO ENABLE
DHHD==BIT14 ; HALF-DUPLEX
DHTSS==12 ; TRANSMITTER SPEED SHIFT
DHTSM==36000 ; TRANSMITTER SPEED MASK
DHRSS==6 ; RECEIVER SPEED SHIFT
DHRSM==1700 ; RECEIVER SPEED MASK
DHEP==BIT5 ; EVEN PARITY
DHPE==BIT4 ; PARITY ENABLE
DHTSB==BIT2 ; TWO STOP BITS
DHCLS==0 ; CHARACTER LENGTH SHIFT
DHCLM==3 ; CHARACTER LENGTH MASK
DHCL5==0 ; CHARACTER LENGTH - 5 BITS
DHCL6==1 ; CHARACTER LENGTH - 6 BITS
DHCL7==2 ; CHARACTER LENGTH - 7 BITS
DHCL8==3 ; CHARACTER LENGTH - 8 BITS
; BIT DEFINITIONS FOR "DHSSR"- SILO STATUS REGISTER.
DHSFLS==10 ; SILO FILL LEVEL SHIFT
DHSFLM==37400 ; SILO FILL LEVEL MASK
DHREMS==6 ; READ EXTENDED MEMORY SHIFT
DHREMM==300 ; READ EXTENDED MEMORY MASK
DHSALS==0 ; SILO ALARM LEVEL SHIFT
DHSALM==77 ; SILO ALARM LEVEL MASK
.NLIST
.ENDC ;DHASB
.LIST
.NLIST
.IF DF TAASB
.LIST
.SBTTL TA11 (CASSETTE) DEVICE REGISTER AND BIT DEFINITIONS, 4-JUNE-75
TACS=177500 ;CONTROL AND STATUS REGISTER
TADB=TACS+2 ;DATA BUFFER REGISTER
TAIV==260 ;INTERRUPT VECTOR
; BIT ASSIGNMENTS WITHIN THE CONTROL AND STATUS REGISTER
TAGO==1 ;GO = START OPERATION
TAFUNC==16 ;"FUNCTION TO BE PERFORMED" FIELD
TAWFG==0*2 ;"WRITE FILE GAP" FUNCTION
TAWRIT==1*2 ;"WRITE DATA" FUNCTION
TAREAD==2*2 ;"READ DATA" FUNCTION
TASRF==3*2 ;"SPACE REVERSE FILE" FUNCTION
TASRB==4*2 ;"SPACE REVERSE BLOCK (RECORD)" FUNCTION
TASFF==5*2 ;"SPACE FORWARD FILE" FUNCTION
TASFB==6*2 ;"SPACE REVERSE BLOCK (RECORD)" FUNCTION
TAREWD==7*2 ;"REWIND" FUNCTION
TAILBS==20 ;INITIATE LAST BYTE SEQUENCE
TAREDY==40 ;READY
TAINTE==100 ;INTERRUPT ENABLE
TARQST==200 ;TRANSFER REQUEST
TAUNIT==400 ;UNIT SELECTION
TAOFFL==1000 ;UNIT OFF LINE
TATERR==2000 ;TIMING ERROR (LOST DATA)
TAFGAP==4000 ;FILE GAP
TALOCK==10000 ;WRITE LOCKED
TALEAD==20000 ;CLEAR LEADER
TABCHK==40000 ;BLOCK CHECK (BAD CRC AFTER READ)
TAEROR==100000 ;ERROR (ERROR SUMMARY BIT)
.NLIST
.ENDC ;TAASB
.LIST
.NLIST
.IF DF RXASB
.LIST
.SBTTL RX11/RX01 (FLOPPY) REGISTERS AND BIT DEFINITIONS, 22-JULY-75
;RX11 STANDARD DEVICE ADDRESSES
RXCS=177170 ;COMMAND STATUS REGISTER
RXDB=177172 ;DATA BUFFER REGISTER
RXSA=177172 ;SECTOR ADDRESS REGISTER
RXTA=177172 ;TRACK ADDRESS REGISTER
RXES=177172 ;ERROR STATUS REGISTER
RXIV==264 ;INTERRUPT VECTOR ADDRESS
;RX11 FUNCTION CODES
RXFBUF==0 ;FILL BUFFER
RXEBUF==2 ;EMPTY BUFFER
RXWSEC==4 ;WRITE SECTOR
RXRSEC==6 ;READ SECTOR
RXRSTAT=12 ;READ STATUS
RXWDDS==14 ;WRITE DELETED DATA SECTOR
RXRERR==16 ;READ ERROR REGISTER
;RX11 COMMAND AND STATUS REGISTER BIT DEFINITIONS
RXGO==1 ;GO
RXU1==20 ;RX01 UNIT # 1
RXDONE==40 ;DONE
RXIE==100 ;INTERRUPT ENABLE
RXTREQ==200 ;TRANSFER REQUEST
RXINI==40000 ;INITIALIZE
RXERROR==100000 ;ERROR
;RX11 ERROR STATUS REGISTER BIT DEFINITIONS
RXCRCE==1 ;CRC ERROR
RXPARE==2 ;PARITY ERROR
RXIDONE==4 ;INITIALIZE DONE
RXDDD==100 ;DELETED DATA DETECTED
RXDRDY==200 ;DRIVE READY
.NLIST
.ENDC ;RXASB
.LIST
.NLIST
.IF DF TCASB
.LIST
.SBTTL TC11 (DECTAPE) DEVICE REGISTERS AND BIT DEFINITIONS, 4-JUNE-75
;DECTAPE PARAMETERS
TCILO==BIT12 ;ILLEGAL OPERATION
TCSELE==BIT11 ;SELECTION ERROR
TCIE==BIT6 ;INTERRUPT ENABLE
TCDO==BIT0 ;DO OPERATION
TCRDATA==BIT2 ;READ DATA
TCWDATA==BIT3+BIT2 ;WRITE DATA
TCRNUM==BIT1 ;READ BLOCK NUMBER
TCREV==BIT11 ;REVERSE DIRECTION
TCPAR==BIT14 ;PARITY ERROR
TCBLKM==BIT10 ;BLOCK MISSED
TCDATM==BIT9 ;DATA MISSED
TCMTE==BIT13 ;MARK TRACK ERROR
TCERR==BIT15 ;DECTAPE ERROR
TCRDY==BIT7 ;READY
TCSOFT==TCPAR+TCBLKM+TCDATM+TCMTE
TCST=177340 ;STATUS REGISTER
TCCM=177342 ;COMMAND REGISTER
TCCM1=177343 ;COMMAND UPPER BYTE
TCWC=177344 ;WORD COUNT REGISTER
TCBA=177346 ;BUS MEMORY ADDRESS
TCDT=177350 ;DATA REGISTER
.NLIST
.ENDC ;TCASB
.LIST
.NLIST
.IF DF RPASB
.LIST
.SBTTL RH11/RP04 REGISTER AND BIT DEFINITIONS, 4-JUNE-75
BLKSIZ==256. ;DISK BLOCK SIZE (IN 16-BIT WORDS)
IFESIZ==3 ;INDEX FILE ENTRY SIZE (IN 16-BIT WORDS)
FDESIZ==16. ;FILE DIRECTORY ENTRY SIZE (IN 16-BIT WORDS)
RPCS1==0 ;OFFSET TO RH11/RP04 CONTROL & STATUS REGISTER 1
RPTRE==BIT14 ;"TRANSFER ERROR" BIT IN RPCS1
RPMCPE==BIT13 ;"MASSBUS CONTROL BUS PARITY ERROR" BIT IN RPCS1
RPDVA==BIT11 ;"DRIVE AVAILABLE" BIT IN RPCS1
RPRDY==BIT7 ;"CONTROLLER READY" BIT IN RPCS1
RPPRST==21 ;READ-IN PRESET FUNCTION IN RPCS1
RPPACK==23 ;PACK ACKNOWLEDGE (SET VV) FUNCTION IN RPCS1
RPWTFN==61 ;WRITE DATA FUNCTION IN RPCS1
RPRDFN==71 ;READ DATA FUNCTION IN RPCS1
RPWC==2 ;OFFSET TO RH11/RP04 WORD COUNT REGISTER
RPBA==4 ;OFFSET TO RH11/RP04 UNIBUS ADDRESS REGISTER
RPDA==6 ;OFFSET TO RH11/RP04 TRACK & SECTOR ADDRESS REGISTER
RPCS2==10 ;OFFSET TO RH11/RP04 CONTROL & STATUS REGISTER 2
RPCLR==BIT5 ;"CONTROLLER (AND MASSBUS) CLEAR" BIT IN RPCS2
RPDS==12 ;OFFSET TO RH11/RP04 DRIVE STATUS REGISTER
RPATA==BIT15 ;"ATTENTION ACTIVE" BIT IN RPDS
RPERR==BIT14 ;"COMPOSITE ERROR" BIT IN RPDS
RPMOL==BIT12 ;"MEDIUM ON-LINE" BIT IN RPDS
RPDPR==BIT8 ;"DRIVE PRESENT" BIT IN RPDS
RPDRY==BIT7 ;"DRIVE READY" BIT IN RPDS
RPVV==BIT6 ;"VOLUME VALID" BIT IN RPDS
RPOF==32 ;OFFSET TO RH11/RP04 OFFSET REGISTER (CONTAINING FMT22)
RPFMT==BIT12 ;"FMT22" (16-BIT WORDS) BIT IN RPOF
RPECI==BIT11 ;"ERROR CORRECTION CODE INHIBIT" BIT IN RPOF
RPDC==34 ;OFFSET TO RH11/RP04 DESIRED CYLINDER REGISTER
.NLIST
.ENDC ;RPASB
.LIST
.NLIST
.IF DF LPASB
.LIST
.SBTTL LP20 REGISTER AND BIT DEFINITIONS, 27-JUNE-75
LP20A=177440 ;LP20 1ST CONTROLLER ADDRESS
LP20B=177460 ;LP20 2ND CONTROLLER ADDRESS
LPAVEC==210 ;LP20A INTERRUPT VECTOR
LPBVEC==200 ;LP20B INTERRUPT VECTOR
LPCSRA==0 ;OFFSET TO LP20 PRIMARY STATUS REGISTER
LPERR==BIT15 ;"ERROR" BIT IN LPCSRA
LPPZRO==BIT14 ;"PAGZRO" BIT IN LPCSRA
LPUCHR==BIT13 ;"UNDCHR" BIT IN LPCSRA
LPVRDY==BIT12 ;"UNDCHR" BIT IN LPCSRA
LPONLN==BIT11 ;"ONLINE" BIT IN LPCSRA
LPDELH==BIT10 ;"DELHLD" BIT IN LPCSRA
LPLINI==BIT9 ;"LOINIT" BIT IN LPCSRA
LPRERR==BIT8 ;"RSTERR" BIT IN LPCSRA
LPDONE==BIT7 ;"DONE" BIT IN LPCSRA
LPIENB==BIT6 ;"INTENB" BIT IN LPCSRA
LPBA17==BIT5 ;"BUSA17" BIT IN LPCSRA
LPBA16==BIT4 ;"BUSA16" BIT IN LPCSRA
LPVLOD==BIT3 ;"VFULOD" BIT IN LPCSRA
LPTMOD==BIT2 ;"TSTMOD" BIT IN LPCSRA
LPPENB==BIT1 ;"PARENB" BIT IN LPCSRA
LPGO==BIT0 ;"GO" BIT IN LPCSRA
LPCSRB==2 ;OFFSET TO LP20 ERROR AND TEST REGISTER
LPTPBT==BIT12 ;"LPTPBT" BIT IN LPCSRB
LPT02==BIT10 ;"TEST02" BIT IN LPCSRB
LPT01==BIT9 ;"TEST01" BIT IN LPCSRB
LPT00==BIT8 ;"TEST00" BIT IN LPCSRB
LPOFFL==BIT7 ;"OFFLIN" BIT IN LPCSRB
LPVERR==BIT6 ;"VFUERR" BIT IN LPCSRB
LPTPAR==BIT5 ;"LPTPAR" BIT IN LPCSRB
LPMPAR==BIT4 ;"MEMPAR" BIT IN LPCSRB
LPRPAR==BIT3 ;"RAMPAR" BIT IN LPCSRB
LPSYNT==BIT2 ;"SYNTIM" BIT IN LPCSRB
LPDEMT==BIT1 ;"DEMTIM" BIT IN LPCSRB
LPGOER==BIT0 ;"GOERR" BIT IN LPCSRB
LPBSAD==4 ;OFFSET TO LP20 DMA BUS ADDRESS REGISTER
LPBCTR==6 ;OFFSET TO LP20 DMA BYTE COUNTER REGISTER
LPPCTR==10 ;OFFSET TO LP20 PAGE COUNTER REGISTER
LPRAMD==12 ;OFFSET TO LP20 RAM DATA REGISTER
LPCBUF==14 ;OFFSET TO LP20 CHAR BUFFER REGISTER (BYTE)
LPCCTR==15 ;OFFSET TO LP20 COLUMN COUNTER REGISTER (BYTE)
LPCKSM==16 ;OFFSET TO LP20 CHECKSUM REGISTER (BYTE)
LPPDAT==17 ;OFFSET TO LP20 PRINTER DATA REGISTER (BYTE)
.NLIST
.ENDC ;LPASB
.LIST