.ADD(ALLLOCS,LG684,LG684V) .ADD(ALLLOCS,LG683,LG683V) .add(alllocs,L8X30,lgx8v) ;8 ROW LG684 MDWL,< .ADD(ALLWW,LG684,L684TV) .ADD(ALLWW,LG683,L683TV) .add(allww,L8X30,lgx8tv) >;MDWL ;Note! These .ADD's must be outside of block structure BEGIN LG684 %DIPG__-=18 ;DIP GROUP (The letter) %DIPS__-=18 ;DIP SLOT (The number) %DIPOF__-=18 ;DIP OFFSET %CONT__-=18 ;CONNECTOR TYPE 0  DEC 1  FLAT CABLE "J" %CONN__-=18 ;CONNECTOR NUMBER (LETTER OR JACK #) %CONP__-=18 ;CONNECTOR PIN # GPINS__400 ;NOMEN FOR "G" PINS ON BOARD STARTS AT 400 ; 401 IS "G1", ETC. BRDGND__=10 ; PIN 10 IS DEDICATED GROUND BRDPWR__=20 ; PIN 20 IS DEDICATED POWER MXDPIN__=36 ;MAXIMUM NUMBER OF DEC PINS/CONNECTOR ;The L8X30 board has an area of 16 pin DIP's, in 7 rows (A-H), columns 5-30 ; and an 2 areas of 20 pin dips: rows A-F cols 1-4, and row J cols 1-30 ; (There is no H row for columns 1-4) ;The LG684 board consists of 6 rows of 20 dips ;Row A, slot1 is the upper left (with connector paddles up, ; and from DIP side) ;MAX # PINS ON EACH SCOTCHFLEX CONN (J0 IS ILLEGAL) JACKSZ: FOR I IN (0,50,50,40,40,50,50,40,40,50,50,40,40) < =I > COMMENT  AUGAT-LG684 CONNECTOR PIN FORMAT PRINTS AS J#-# OR LL# THE J IS LITERAL. ______|_____|_____|_____|_____|_____| | 22 26 35 | |1| 4 | 9 | |_______|_|_______|_________________| | | | < | | |------------>PIN | | | |----------------------CONNECTOR NUMBER (JACK OR ROW LETTER) | < |--------------------------->CONNECTOR TYPE 0  DEC, 1  FLAT CABLE  MWL,< comment  All calculations are done from the DIP side. (0,0) at LOWER left hand corner in left handed coordinate system. X+ to right, Y+ is up 0,0 corresponds to FV1 of DEC connectors.  XDIPSP__ =500 ; .500" DIP HORIZONTAL SPACING YDIPSP__=1100 ;1.100" DIP VERTICAL SPACING XGRPOF__=200 ;HORIZONTAL DISTANCE FROM ORIGIN TO DIP PIN10 OF F1 YGRPOF__=600 ;VERTICAL DISTANCE FROM ORIGIN TO DIP PIN10 OF F1 XPINSP__ =300 ; .300" DIP PIN HORIZONTAL SPACING YPINSP__ =100 ; .100" DIP PIN VERTICAL SPACING XGNDOFF__-=100 ;OFFSET FROM DIP SLOT ORIGIN (ON EXTRA GROUND ROW) TO FIRST DIP ;PIN ROW ;CONNECTORS, SCOTCHFLEX FCXOFF__=100 ;.1" RIGHT FOR FIRST PIN OF FLAT CABLE CONNECTORS FCYOFF__=7400 ;7.4" up to first pin of J2 relative to origin FCYOF2__=300 ;.3" up for first pin of J1 relative to J2 FCJ3OF__=2800 ;2.8" RIGHT FOR FIRST PIN OF J3 FCGOF__=5100 ;5.1" RIGHT FOR FIRST PIN OF J5 JCNXOF__=100 ;.1" BETWEEN PINS HORIZ. JCNYOF__=100 ;.1" BETWEEN PINS VERT. ;CONNECTORS, DEC DECCNY__=0 ;0.0" UP TO BOTTOM ROW OF DEC CONNECTORS DCPINO__=200 ;.2" UP FROM BOTTOM TO SECOND ROW DECX1__=2700 ;2.7" LEFT FOR LARGE CONNECTOR SPACES DECX2__=2600 ;2.6" LEFT FOR SMALL CONNECTOR SPACES GAP1T2__DECX2-=1900 ; THE SMALLER GAP BETWEEN DEC PADDLES DCPINS__=1900 ;1.9" RIGHT FOR PIN A1 RELATIVE TO START OF CONNECTOR DCPNSP__=100 ;.1" BETWEEN PINS HORIZONTALLY DCGRSP__=200 ;.2" BETWEEN GROUPS OF PINS >;MWL ;THE TRANSFER VECTOR FOR THE AUGUAT 8136-LG684 BOARD ^LGX8V: ^LG683V: ^LG684V: JRST LCINIT ;BOARD INITIALIZATION JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES JRST $SLTOUT ;PRINTS CARD LOC (B-R-S) JRST $GETSLT ;READS CARD LOC (B-R-S) JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST MDPC,< JRST GTSLTL ;READS (B-R-S) AND BODY LOCN MD,< JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN JRST CPOPJ ;LOCFUK >;MD >;MDPC MWL,< JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE) JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG JRST AUGDIP ;PRINT GROUP, PIN, LOC IN AUGAT FORMAT >;MWL [ASCIZ/L#/] ; CUE FOR BOARD SLOT [ASCIZ /#/] ; CUE FOR BOARD PIN MDPC,< [ASCIZ/J#-# or LL# /] ;CUE FOR CONNECTOR PIN [ASCIZ/L# /] ;CUE FOR BODY LOC [ASCID /A01/] ;PROTOTYPE FOR BODY LOC >;MDPC MWL,< [ASCIZ/L#/] ;WIRELISTER BODY CUE [ASCIZ/J# or L/] ;WIRELISTER CONNECTOR BODY CUE >;MWL CHECK LG684V,LTVLEN CHECK LG683V,LTVLEN L2NSUB: BLOCK L2NLEN ;******* N2LSUB: REPEAT N2LLEN, < "?" > EN2L__. NNN__1 FOR I IN(A,B,C,D,E,F,H,J,K,L,M,N,P,R,S,T,U,V) < L2N2L I,0 > FOR I IN (G,I,O,Q) < L2N2L I,1B0 > N2LMAX__NNN-1 ORG EN2L LCINIT: MOVE T,[L2NSUB,,L2N] BLT T,L2N+L2NLEN+N2LLEN-1 MOVEI T,N2LMAX MOVEM T,MAXN2L SETZM L8X30F MOVE T,NOMTYP MOVE T,@LNAMES(T) CAMN T,[ASCII /L8X30/] SETOM L8X30F MOVE TT,[PAR684,,PARAMS] CAMN T,[ASCII/LG683/] MOVE TT,[PAR683,,PARAMS] CAMN T,[ASCII /L8X30/] MOVE TT,[PR8X30,,PARAMS] BLT TT,PARAMS+LPARAM-1 POPJ P, STORAGE(IMPURE) PARAMS: NGRPS: 0 ;NUMBER OF DIP ROWS MXJCON: 0 ;MAX NUMBER FLAT CABLE CONNECTORS MXDCON: 0 ;MAX NUMBER OF DEC STYLE CONNECTORS GRPCOL: 0 ;# COLS IN GROUP GRPDIP: 0 ;# DIPS IN GROUP MWL,< UMLROW: 0 ;LENGTH OF ROW IS UML #ROWS FLTMAX__=12 FLXPIN: BLOCK FLTMAX DECMAX__=6 DCLOC: BLOCK DECMAX >;MWL LPARAM__.-PARAMS L8X30F: 0 ;-1 IFF kludge board STORAGE(PURE) ;VARIABLE STUFF FOR HEX BOARD PAR684: COL684__=30 ;30 DIPS IN EACH OF 6 ROWS FLT684__=12 ;TOTAL # OF SCOTCHFLEX CONNECTORS DEC684__=6 6 FLT684 ;MAX NUMBER FLAT CABLE CONNECTORS DEC684 ;MAX NUMBER OF DEC STYLE CONNECTORS COL684 ;# COLS IN GROUP 1*COL684 ;# DIPS IN GROUP MWL,< COL684 ;LENGTH OF ROW IS UML #ROWS ;**************************************** SCOTCH-FLEX PINS ;FLXPIN: ; X,,Y LOCATION OF LOWER LEFT PIN OF FLAT CABLE GROUP ;INDEXED BY FLAT CABLE NUMBER-1 FOR X_0, , 1 < X*FCGOF+FCXOFF,,FCYOFF+FCYOF2 ;E.G. J1 X*FCGOF+FCXOFF,,FCYOFF ;E.G. J2 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF+FCYOF2 ;E.G. J3 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF ;E.G. J4 > ;**************************************** DEC CONNECTOR PINS ;DCLOC: ;LOCATION OF DEC STYLE CONNECTORS X__DECX1*+DECX2* ;THE X OF V1 ON THE RIGHTMOST PADDLE! ;INITIALLY FAR TO THE RIGHT, CONNECTORS LETTERED IN REVERSE REPEAT DEC684/2, < X,,DECCNY X__X-DECX1 X,,DECCNY X__X-DECX2 > >;MWL CHECK PAR684,LPARAM ;VARIABLE PARAMETERS FOR QUAD HIGH BOARD PAR683: COL683__=20 ;30 DIPS IN EACH OF 6 ROWS FLT683__=8 DEC683__=4 6 FLT683 ;MAX NUMBER FLAT CABLE CONNECTORS DEC683 ;MAX NUMBER OF DEC STYLE CONNECTORS COL683 ;# COLS IN GROUP 1*COL683 ;# DIPS IN GROUP MWL,< COL683 ;LENGTH OF ROW IS UML #ROWS ;**************************************** SCOTCH-FLEX PINS ;FLXPIN: ; X,,Y LOCATION OF UPPER LEFT PIN OF FLAT CABLE GROUP ;INDEXED BY FLAT CABLE NUMBER-1 FOR X_0, , 1 < X*FCGOF+FCXOFF,,FCYOFF+FCYOF2 ;E.G. J1 X*FCGOF+FCXOFF,,FCYOFF ;E.G. J2 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF+FCYOF2 ;E.G. J3 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF ;E.G. J4 > BLOCK FLTMAX-FLT683 ;**************************************** DEC CONNECTOR PINS ;DCLOC: ;LOCATION OF DEC STYLE CONNECTORS X__DECX1*+DECX2* ;THE X OF V1 ON THE RIGHTMOST PADDLE! ;INITIALLY FAR TO THE RIGHT, CONNECTORS LETTERED IN REVERSE REPEAT DEC683/2, < X,,DECCNY X__X-DECX1 X,,DECCNY X__X-DECX2 > BLOCK DECMAX-DEC683 >;MWL CHECK PAR683,LPARAM ;VARIABLE STUFF FOR HEX BOARD, 8 ROWS PR8X30: ;COL684__=30 ;30 DIPS IN EACH OF 6 ROWS ;FLT684__=12 ;TOTAL # OF SCOTCHFLEX CONNECTORS ;DEC684__=6 8 ;NUMBER OF "GROUPS", ACTUALLY DIP ROWS A-F,H,J FLT684 ;MAX NUMBER FLAT CABLE CONNECTORS DEC684 ;MAX NUMBER OF DEC STYLE CONNECTORS COL684 ;# COLS IN GROUP 1*COL684 ;# DIPS IN GROUP MWL,< COL684 ;LENGTH OF ROW IS UML #ROWS ;**************************************** SCOTCH-FLEX PINS ;FLXPIN: ; X,,Y LOCATION OF LOWER LEFT PIN OF FLAT CABLE GROUP ;INDEXED BY FLAT CABLE NUMBER-1 FOR X_0, , 1 < X*FCGOF+FCXOFF,,FCYOFF+FCYOF2 ;E.G. J1 X*FCGOF+FCXOFF,,FCYOFF ;E.G. J2 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF+FCYOF2 ;E.G. J3 X*FCGOF+FCXOFF+FCJ3OFF,,FCYOFF ;E.G. J4 > ;**************************************** DEC CONNECTOR PINS ;DCLOC: ;LOCATION OF DEC STYLE CONNECTORS X__DECX1*+DECX2* ;THE X OF V1 ON THE RIGHTMOST PADDLE! ;INITIALLY FAR TO THE RIGHT, CONNECTORS LETTERED IN REVERSE REPEAT DEC684/2, < X,,DECCNY X__X-DECX1 X,,DECCNY X__X-DECX2 > >;MWL CHECK PR8X30,LPARAM PRNLOC: SETZ TT, JUMPE A,CPOPJ JUMPL A,CNLOC LDB T,[%DIPG,,A] ;GROUP LETTER JUMPE T,CPOPJ ;GROUP NULL? PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT MOVEM T,NDIG LDB T,[%DIPS,,A] ;SLOT NUMBER WITHIN GROUP PUSHJ P,NPUTDEC ;PRINT IT OUT MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT MOVEM T,NDIG LDB T,[%DIPOF,,A] ;ANY SLOT OFFSET? JUMPE T,PRNLC1 PUTBYT "@" MWL,< PUSHJ P,NPUTDEC > MDPC,< PUSHJ P,PUTDEC > PRNLC1: MOVEI TT,"-" POPJ P, CNLOC: LDB T,[%CONT,,A] ;CONNECTOR TYPE JUMPE T,CNDEC ;DEC STYLE CONNECTOR PUTBYT "J" LDB T,[%CONN,,A] ;CONNECTOR NUMBER MOVEI TT,2 MOVEM TT,NDIG PUSHJ P,NPUTDEC MOVEI TT,"-" POPJ P, CNDEC: LDB T,[%CONN,,A] ;CONNECTOR ROW NUMBER PUTBYT @N2L(T) SETZ TT, ;DEC DOESN'T WANT SEP BETWEEN A,A1 POPJ P, PRNPIN: LDB T,[%%PINN,,A] JUMPL A,PRNPNC CAIGE T,GPINS JRST PRNPN1 SUBI T,GPINS PUTBYT "G" PRNPNA: SKIPA TT,[1] PRNPN1: MWL,< MOVEI TT,2 MOVEM TT,NDIG JRST NPUTDEC >;MWL MDPC,< JRST PUTDEC JRST PUTDEC > PRNPNC: LDB TT,[%CONT,,A] ;DEC CONNECTOR PIN PRINTOUT JUMPN TT,PRNPN1 ASH T,-1 PUTBYT @N2L(T) ;PRINT DEC CONNECTOR LETTER LDB T,[%%PINN,,A] ANDI T,1 ADDI T,1 JRST PRNPNA ;PRINT AS 1 DIGIT TRAILING NUMBER ;CONVERT PIN-SPEC TO POST-SPEC ;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN# ;A = MBIT+PIN#,,LOC ;B = PACKAGE ;Skips if can map, with MAPSOC set. ; Possibly MAPPWR or MAPGND if V or G posts on board ;A = New MBIT+PIN#,,LOC ;B = FLAGS,,PIN CHANGE ; %MPLOC ;LOC WAS CHANGED ; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1) ; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE) MDWL,< MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON TLOE A,MAPSOC OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST??? /] JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE JRST CPOPJ1] PUSH P,C PUSH P,D PUSH P,A LDB T,[%DIPG,,A] ;Letter LDB TT,[%DIPS,,A] ;Slot number LDB D,[%DIPOF,,A] ;Offset field within socket LDB A,[%%PINN,,A] ;Pin number JUMPE A,MAPOS1 ;Just return the board socket, without offset SKIPE L8X30F ;Check for kludge L8X30 board JRST [ CAMG T,L2N+"H" CAIGE TT,5 JRST .+1 ;Not within <5-30>, just normal 20 pin MOVEI C,=16 JRST MAPOS8] MOVEI C,=20 ;BOARD HAS 20 PIN SOCKETS MAPOS8: PUSHJ P,MAPPER JRST MAPOSX LDB T,[%DIPS,,(P)] ;NOW OFFSET SLOT MOVEI TT,-1(T) ADD TT,C ;DOES OFFSET OVERFLOW GROUP? CAML TT,GRPCOL JRST MAPOSX ADD T,C DPB T,[%DIPS,,(P)] LDB T,[%DIPG,,(P)] ;FIRST ROW IS A (=1) ADD T,D ;DOES OFFSET OVERFLOW NO. OF ROWS? CAMLE T,NGRPS ;LEGAL ROW # JRST MAPOSX DPB T,[%DIPG,,(P)] MAPOS1: SETZ T, DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY DPB A,[%%PINN,,(P)] AOS -3(P) MAPOSX: POP P,A POP P,D POP P,C POPJ P, >;MDWL GTSLTL: PUSH P,A MOVEI A,[[ASCIZ /L#./] 0] PUSHJ P,LNPARS JRST GTSL0 JRST GTSL1 SETZ TT, PUSHJ P,GATLOC JRST GTSL0 CAIE CHRREG,"@" JRST GTSL2 PUSH P,TT GETNUM POP P,TT JUMPE NUMREG,GTSL0 DPB NUMREG,[%DIPOF,,TT] GTSL2: MOVEM TT,DESTIN AOS -1(P) GTSL1: AOS -1(P) GTSL0: POP P,A POPJ P, GATLOC: SKIPE A,ARG1 CAMLE A,NGRPS POPJ P, DPB A,[%DIPG,,TT] SKIPE A,ARG2 CAMLE A,GRPDIP POPJ P, DPB A,[%DIPS,,TT] JRST CPOPJ1 MD,< ;THIS SHOULD PROBABLY TRY FOR B-R-S ALSO, BUT...? GTCONP: PUSH P,A MOVEI A,[[ASCIZ /J#-#/] [ASCIZ /LL#/] 0] PUSHJ P,LNPARSE JRST GTCON0 JRST GTCON1 ;NULL INPUT PUSHJ P,GATCON ;GET JACK OR PADDLE PART OF LOC JRST GTCON0 LDB A,[%CONT,,TT] JUMPE A,GTDCP ;GET DEC STYLE CONNECTOR PIN LDB A,[%CONN,,TT] ;WHICH JACK HRRZ A,JACKSZ(A) CAMGE A,ARG4 ;LEGAL PIN#? JRST GTCON0 ;NO SKIPN A,ARG4 JRST GTCON0 GTCON3: DPB A,[%CONP,,TT] HRRZM TT,DESTIN AOS -1(P) GTCON1: AOS -1(P) GTCON0: POP P,A POPJ P, GTDCP: SKIPE A,ARG2 ;READ AND CONVERT DEC CONNECTOR PIN NUMBER CAILE A,MXDPIN/2 JRST GTCON0 ;LETTER TOO BIG SOSL A,ARG3 CAILE A,1 JRST GTCON0 MOVE A,ARG2 ASH A,1 IOR A,ARG3 JRST GTCON3 >;MD GATCON: SETZ TT, JUMPN A,GTCN1 ;DEC PADDLE? (VS. SCOTCHFLEX) SKIPE A,ARG2 ;ARG1 IS THE "J" CAMLE A,MXJCON POPJ P, DPB A,[%CONN,,TT] MOVEI A,1 GTCN2: DPB A,[%CONT,,TT] ;THIS IS A FLAT CABLE CONNECTOR TLO TT,MAPCON JRST CPOPJ1 GTCN1: SKIPE A,ARG1 CAMLE A,MXDCON ;MAX NUMBER OF DEC CONNECTORS POPJ P, DPB A,[%CONN,,TT] MOVEI A,0 ;THIS IS A DEC STYLE CONNECTOR JRST GTCN2 MWL,< GETLOC: MOVEI A,[[ASCIZ /J#/] ;0 - Scotchflex connector [ASCIZ /L#/] ;1 - Board socket [ASCIZ /L#@#/] ;2 - Board socket with offset [ASCIZ /L/] ;3 - Dec connector 0] SKIPE L8X30F MOVEI A,[[ASCIZ /Z#/] ;0 - Scotchflex connector - not really there [ASCIZ /L#/] ;1 - Board socket [ASCIZ /L#@#/] ;2 - Board socket with offset [ASCIZ /L/] ;3 - Dec connector 0] PUSHJ P,LNPARSE POPJ P, POPJ P, SKIPE A ;STRING 0,3 ARE CONNECTOR FORMATS CAIN A,3 ;DEC CONN MUST BE .NE. 0 FOR GATCON JRST GATCON SETZ TT, MOVE T,ARG4 CAIN A,2 ;THE OFFSET CASE DPB T,[%DIPOF,,TT] JRST GATLOC ;Print location for fixed format card image ;8 cols wide, with "group" left justified, "pin number" right justified RAYDIP: TLNN A,MAPSOC PUSHJ P,FUCKUP PUSHJ P,PRNLOC ;A01 or J01 or C LDB T,[%%PINN,,A] ;DIP PIN NUMBER JUMPL A,RAYCON CAIL T,GPINS JRST RAYDP1 PUTSTR [ASCIZ / /] ;3 SPACES MOVEI TTT,2 MOVEM TTT,NDIG JRST NPUTDEC ;"A01" + 3 spaces + ## = 8 RAYDP1: SUBI T,GPINS PUTSTR [ASCIZ / /] ;2 SPACES CAIGE T,=10 PUTBYT 40 ;"A01" + 3 spaces + G# = 8 PUTBYT "G" JRST PUTDEC ;"A01" + 2 spaces + G## = 8 RAYCON: PUTSTR [ASCIZ / /] ;3 spaces LDB TT,[%CONT,,A] JUMPN TT,RAYCN1 ;Scotchflex PUTSTR [ASCIZ / /] ;"C" + 5 spaces LDB T,[%%PINN,,A] TRNN T,1 PUTBYT "1" TRNE T,1 PUTBYT "2" ASH T,-1 PUTBYT @N2L(T) POPJ P, ;"C" + 5 spaces + #L = 8 RAYCN1: LDB T,[%%PINN,,A] MOVEI TTT,2 MOVEM TTT,NDIG JRST NPUTDEC ;"J01" + 3 spaces + ## = 8 ;AUGAT format ;Print location for fixed format card image ;2-3 columns "GROUP", 2 columns "LOC", 3 columns pin ;DIP A.. 01 . 001 ;DECCON AJ. 01 . 0A1 ;FLAT J01 01 . 001 AUGDIP: TLNN A,MAPSOC PUSHJ P,FUCKUP JUMPL A,AUGCON LDB T,[%DIPG,,A] PUTBYT @N2L(T) PUTSTR [ASCIZ / /] ;2 SPACES LDB T,[%DIPS,,A] MOVEI TTT,2 MOVEM TTT,NDIG PUSHJ P,NPUTDEC PUTSTR [ASCIZ / /] ;1 SPACE LDB T,[%%PINN,,A] MOVEI TTT,3 MOVEM TTT,NDIG JRST NPUTDEC AUGCON: LDB TT,[%CONT,,A] JUMPN TT,AUGCN1 ;Scotchflex LDB T,[%CONN,,A] PUTBYT @N2L(T) PUTSTR [ASCIZ /J 01 0/] ;Constant garbage LDB T,[%%PINN,,A] LSH T,-1 PUTBYT @N2L(T) LDB T,[%%PINN,,A] TRNN T,1 PUTBYT "1" TRNE T,1 PUTBYT "2" POPJ P, ;Scotchflex flat cable connector AUGCN1: PUTBYT "J" LDB T,[%CONN,,A] ;CONNECTOR NUMBER MOVEI TT,2 MOVEM TT,NDIG PUSHJ P,NPUTDEC PUTSTR [ASCIZ /01 /] MOVEI TT,3 MOVEM TT,NDIG LDB T,[%%PINN,,A] JRST NPUTDEC FOR NAME IN (CPARTP:,CONGIN:,SEQLOC:) >;MWL CPNSEP: LDB TT,[%CONP,,T] MOVEI TTT,0 DPB TTT,[%CONP,,T] POPJ P, CPNMER: PUSH P,A SKIPN T SKIPE TT JRST CPNMR1 MOVEI TT,1 ;T,TT=0 MEANS INITIALIZE TO FIRST DPB TT,[%CONN,,T] ;CONNECTOR TYPE STARTS AT ZERO CPNMR1: LDB TTT,[%CONN,,T] HRRZ A,JACKSZ(TTT) LDB TTT,[%CONT,,T] SKIPN TTT MOVEI A,MXDPIN CAMG TT,A JRST CNPMR1 MOVEI TT,1 ;CARRY INTO JACK, FROM PIN# LDB TTT,[%CONT,,T] MOVE A,MXJCON SKIPN TTT MOVE A,MXDCON LDB TTT,[%CONN,,T] AOS TTT DPB TTT,[%CONN,,T] CAIGE TTT,A JRST CNPMR1 MOVEI TTT,1 DPB TTT,[%CONN,,T] LDB TTT,[%CONT,,T] AOS TTT DPB TTT,[%CONT,,T] CNPMR1: DPB TT,[%CONP,,T] POP P,A POPJ P, QUPIN: SETZ A, ;NO RULE NUMBER POPJ P, ;AND IT'S NOT WILD NOTYET(CPNMAP:) MDWL,< MWL,< SUBTTL WIRE WRAP ROUTINES -- HEX DEC 20 PIN BOARDS ^^L684TV__. ;TRANSFER VECTOR FOR HEX HEIGHT 20 PIN DEC BOARDS -1 ;FLAGS IF WIRE WRAP OR PC BOARD JRST CPOPJ ;THE INIT ROUTINE JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS JRST DISTPP ;DISTANCE CALC ROUTINE JRST FPWR ;FIND A POST WITH POWER JRST FGND ;FIND A POST WITH GND JRST MAPIT ;CONVERT POST INTO X,Y,BITS JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE JRST GNDCLR ;? JRST WAGGND ;? JRST GNDOUT ;? JRST VCCOUT ;? COL684 ;NROWS (USED FOR UML ONLY) 6 ;A-F NCOLS (USED FOR UML ONLY) 6 ;NCLPRG (USED FOR UML ONLY) 0 ;NRWPRP (USED FOR UML ONLY) COL684*6 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY) SETPAD(DEC684+FLT684) ;NPADS (USED FOR UML ONLY) XWD -=25,1 ;PADLET (USED FOR UML ONLY) XWD -2,1 ;PADPIN (USED FOR UML ONLY) =10 ;FRACTN =200*2 ;WRAPMG .200" INSULATION AROUND EACH POST =1500 ;POSTMG .750" BARE WIRE AROUND EACH POST 0 ;NEXTR CHECK L684TV,WTVLEN ^^L683TV__. ;TRANSFER VECTOR FOR QUAD HEIGHT 20 PIN DEC BOARDS -1 ;FLAGS IF WIRE WRAP OR PC BOARD JRST CPOPJ ;THE INIT ROUTINE JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS JRST DISTPP ;DISTANCE CALC ROUTINE JRST FPWR ;FIND A POST WITH POWER JRST FGND ;FIND A POST WITH GND JRST MAPIT ;CONVERT POST INTO X,Y,BITS JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE JRST GNDCLR ;? JRST WAGGND ;? JRST GNDOUT ;? JRST VCCOUT ;? COL683 ;NROWS (USED FOR UML ONLY) 6 ;NCOLS (USED FOR UML ONLY) 6 ;NCLPRG (USED FOR UML ONLY) 0 ;NRWPRP (USED FOR UML ONLY) COL683*6 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY) SETPAD(DEC683+FLT683) ;NPADS (USED FOR UML ONLY) XWD -=25,1 ;PADLET (USED FOR UML ONLY) XWD -2,1 ;PADPIN (USED FOR UML ONLY) =10 ;FRACTN =200*2 ;WRAPMG .200" INSULATION AROUND EACH POST =1500 ;POSTMG .750" BARE WIRE AROUND EACH POST 0 ;NEXTR CHECK L683TV,WTVLEN ^^LGX8TV__. ;TRANSFER VECTOR FOR HEX HEIGHT 20 PIN DEC BOARDS -1 ;FLAGS IF WIRE WRAP OR PC BOARD JRST CPOPJ ;THE INIT ROUTINE JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS JRST DISTPP ;DISTANCE CALC ROUTINE JRST FPWRX8 ;FIND A POST WITH POWER JRST FGNDX8 ;FIND A POST WITH GND JRST MAPIT ;CONVERT POST INTO X,Y,BITS JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE JRST GNDCLR ;? JRST WAGGND ;? JRST GNDOUT ;? JRST VCCOUT ;? COL684 ;NROWS (USED FOR UML ONLY) 8 ;A-G NCOLS (USED FOR UML ONLY) 8 ;NCLPRG (USED FOR UML ONLY) 0 ;NRWPRP (USED FOR UML ONLY) COL684*6 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY) SETPAD(DEC684+FLT684) ;NPADS (USED FOR UML ONLY) XWD -=25,1 ;PADLET (USED FOR UML ONLY) XWD -2,1 ;PADPIN (USED FOR UML ONLY) =10 ;FRACTN =200*2 ;WRAPMG .200" INSULATION AROUND EACH POST =1500 ;POSTMG .750" BARE WIRE AROUND EACH POST 0 ;NEXTR CHECK LGX8TV,WTVLEN ;TABLES FOR MAPIT ;**************************************** DIP PINS DEFINE XY(X,Y) < X*XPINSP,,Y*YPINSP > ;Pin position offset from socket origin (pin 10, lower left). DIP side! PINTAB: FOR Y_9, 0, -1 < XY(0,Y) > FOR Y_0, 9, 1 < XY(1,Y) > ;**************************************** DEC CONNECTOR PINS ;PIN POSITIONS WITHIN ONE PADDLE X__DCPINS ;INITIAL X STARTING LOCATION DCPINL: REPEAT 3, < REPEAT 6, < X,,0 X,,DCPINO X__X-DCPNSP > X__X-DCGRSP+DCPNSP ;ALREADY SUB'ED AN EXTRA DCPNSP AT END OF RPT > DCPWRG: 0 ;A1 PWR,,500 0 ;B1 0 0 ;C1 GND,,0 DCGNDT__.-DCPWRG+1 0 ;D1 0 0 ;E1 0 0 ;F1 0 0 ;H1 0 0 ;J1 0 0 ;K1 0 0 ;L1 0 0 ;M1 0 0 ;N1 0 0 ;P1 0 0 ;R1 0 0 ;S1 0 GND,,0 ;T1 DCGNDB__.-DCPWRG+1 0 0 ;U1 0 0 ;V1 0 MAPIT: JUMPL A,CONMAP ;MAP CONNECTOR LOCATION PUSHJ P,MAPLOC ;MAP DIP LOCN POPJ P, ;BAD LOCN LDB TTT,[%%PINN,,A] ;PIN # CAIL TTT,GPINS ;WANT POWER OR GROUND? JRST PINPGP ;YES, RETURN FIX IT UP MAPIT0: ADD T,PINTAB-1(TTT) ;ADD EXTRA XY FOR PIN SKIPN L8X30F ;Kludge board? JRST MAPIT1 LDB TT,[%DIPG,,A] ;Letter CAMLE TT,L2N+"H" JRST MAPIT1 LDB TT,[%DIPS,,A] ;Slot number CAIGE TT,5 JRST MAPIT1 ;NORMAL DIP AREA SETZ TT, CAIN TTT,=8 MOVE TT,[PWR,,=1200] CAIN TTT,=16 MOVSI TT,GND SETZ TTT, ;FLUSH AWAY THOSE GOODIES JRST CPOPJ1 MAPIT1: SETZ TT, CAIN TTT,BRDGND MOVSI TT,GND CAIN TTT,BRDPWR MOVE TT,[PWR,,=500] ;+5.00 VOLTS SETZ TTT, ;FLUSH AWAY THOSE GOODIES JRST CPOPJ1 ; TWP GROUND PINS FOR SOCKET PINPGP: CAIN TTT,GPINS+3 ;ONLY PIN 3 HAS A LEGAL GROUND PIN POPJ P, ;OTHERWISE, ILLEGAL MAP HRRZ TT,PINTAB-GPINS-1(TTT) ;GET Y OFFSET ONLY FOR DIP PIN ADD T,TT ;ADD IT INTO PIN POSITION ADD T,[XGNDOFF,,0] ;GND PINS ARE OFFSET IN X MOVSI TT,GND PINPG1: SETZ TTT, JRST CPOPJ1 ;Convert PIN-SPEC in A into DIP X,Y locn (T) ;Y + UP ;X + RIGHT (FROM DIP SIDE) MAPLOC: LDB TT,[%DIPG,,A] ;GROUP LETTER JUMPE TT,CPOPJ CAMLE TT,NGRPS ;GROUP TOO BIG? POPJ P, LDB T,[%DIPS,,A] ;DIP # JUMPE T,CPOPJ CAMLE T,GRPDIP ;TOO MANY DIPS FOR SLOT POPJ P, ;Slot 1 is X=0 SOS T IMULI T,XDIPSP ;SLOT NUMBER IS OFFSET HORIZONTALLY HRLZ T,T ;Row F is Y=0 MOVNS TT ADD TT,NGRPS IMULI TT,YDIPSP ;CALCULATE Y OFFSET HRR T,TT ADD T,[XGRPOF,,YGRPOF] ;ADD IN OFFSET FOR ENTIRE DIP ARRAY JRST CPOPJ1 ;HERE FOR CONNECTOR PINS CONMAP: LDB T,[%CONT,,A] JUMPE T,CONDEC ;DEC STYLE CONNECTOR LDB T,[%CONN,,A] ; T HAS CONNECTOR NUMBER JUMPE T,CPOPJ CAMLE T,MXJCON POPJ P, HRRZ TTT,JACKSZ(T) ;TTT HAS MAX NUMBER OF PINS FOR THIS CONNECTOR LDB TT,[%%PINN,,A] JUMPE TT,CPOPJ CAMLE TT,TTT POPJ P, ;ILLEGAL NUMBER OF PINS ASH TTT,-1 MOVE T,FLXPIN-1(T) ;X,Y for whole connector CAMLE TT,TTT ;Bottom row? JRST CNFCL SOS TT ;YES IMULI TT,JCNXOF HRLZS TT ;X,,Y OFFSET OF PIN WITHIN CONNECTOR ADD T,TT SETZB TTT,TT JRST CPOPJ1 ;Top row Scotchflex pins, (all grounds) CNFCL: SUBI TT,1(TTT) IMULI TT,JCNXOF HRLZS TT HRRI TT,JCNYOF ;X,,Y OFFSET OF PIN WITHIN CONNECTOR ADD T,TT MOVSI TT,GND SETZ TTT, JRST CPOPJ1 CONDEC: LDB TT,[%CONN,,A] JUMPE TT,CPOPJ CAMLE TT,MXDCON POPJ P, MOVE T,DCLOC-1(TT) ;PADDLE X,Y LDB TT,[%%PINN,,A] CAIL TT,2 ;2+0 IS A+1 PIN CAILE TT,MXDPIN+2-1 POPJ P, ADD T,DCPINL-2(TT) MOVE TT,DCPWRG-2(TT) SETZ TTT, JRST CPOPJ1 PAKSIZ: SKIPE ILLPAK(B) POPJ P, LDB TT,[%DIPS,,A] ;STARTING DIP SLOT LDB T,[%DIPG,,A] ;Row A, slot 1 is upper left SUB T,PAKHGT(B) ADD TT,PAKWID(B) ;HORIZONTAL EXTENT OF ADAPTOR JUMPLE T,CPOPJ JUMPLE TT,CPOPJ CAMG T,NGRPS CAMLE TT,GRPCOL ;MUST BE WITHIN GROUP HORIZONTALLY POPJ P, JRST PAKDIM ;Define illegal package types in this board ; -1 if illegal ILLPAK: BLOCK NPACK FOR @' I IN (22,24,36,40,48,64) ORG ILLPAK+NPACK MAPRC: HLRZ TT,T ;(1,1) IS DIP IN UPPER LEFT HAND CORNER SOJL TT,CPOPJ CAML TT,NROWS POPJ P, HRRZS T ;ROW IN TT, COL IN T SOJL T,CPOPJ CAML T,NCOLS ;(0,0) IS NOW IN UPPER LEFT POPJ P, PUSH P,[0] MOVNS TT ADD TT,GRPCOL ;COL 30 IS FIRST ROW OF UML DPB TT,[%DIPS,,(P)] MOVNS T ;LAST UML COL CORRESPONDS TO FIRST DIP GROUP HRRZS T ADD T,NGRPS DPB T,[%DIPG,,(P)] POP P,T JRST CPOPJ1 MAPPAD: SOS TT ASH TT,1 ;TT,TTT HAVE COMPLEX PIN# ADDI TT,(TTT) CAMLE T,MXDCON JRST MAPPD1 AOS TT ;DEC PADDLES ARE PINLETTER*2+SIDE CAILE TT,MXDPIN+2-1 ;EXISTS? JRST MAPPDL ;NO, ERROR HRLI T,0 MAPPD2: MOVSI TTT,MAPCON(TT) ;PIN# IN LH DPB T,[%CONN,,TTT] HLRZS T DPB T,[%CONT,,TTT] SKIPA T,TTT MAPPDL: SETZ T, ;LOSE RETURN POPJ P, MAPPD1: SUB T,MXDCON HRLI T,1 ;CONN TYPE IS SCOTCH CAMLE TT,JACKSZ(T) JRST MAPPDL JRST MAPPD2 FPWRX8: LDB T,[%DIPG,,A] ;Letter LDB TT,[%DIPS,,A] ;Slot number CAMG T,L2N+"H" CAIGE TT,5 JRST FPWR ;NORMAL DIP AREA FPWRN: SETZ A, ;NO SUCH PIN POPJ P, FPWR: CAIE B,=500 ;+5.00V?? JRST FPWRN MOVE T,A ;SAVE IF CONN PIN MOVEI B,BRDPWR DPB B,[%%PINN,,A] TLO A,MAPSOC JUMPL A,FPWRC POPJ P, FGNDX8: LDB T,[%DIPG,,A] ;Letter LDB TT,[%DIPS,,A] ;Slot number CAMG T,L2N+"H" CAIGE TT,5 JRST FGND ;NORMAL DIP AREA FGNDN: SETZ A, ;NO SUCH PIN POPJ P, FGND: MOVE T,A MOVEI B,BRDGND DPB B,[%%PINN,,A] TLO A,MAPSOC JUMPL A,FGNDC POPJ P, ;Find ground for connector FGNDC: LDB TT,[%CONT,,A] JUMPE TT,FGNDDC MOVE TT,L2N+"A" JRST FPWRC1 ;;??? MIGHT BE DECOMMITTED ??? LDB TT,[%CONN,,A] ;USE ROW OF GNDS ON OTHER HALF OF CONN LDB T,[%%PINN,,T] ;ORIGINAL PIN# HRRZ TT,JACKSZ(TT) ASH TT,-1 CAMG T,TT ADD T,TT FGNDC1: DPB T,[%%PINN,,A] TLO A,MAPSOC POPJ P, ;SEARCH FOR CLOSEST BOARD PIN TO WIRE TO ;A = MAPSOC+BRDPWR/GND,, ;T = ORIGINAL CONNECTOR PIN FPWRC: LDB TT,[%CONT,,A] ;CONNECTOR TYPE? JUMPE TT,FGNDDC ;DEC PADDLE MOVE TT,L2N+"A" ;SCOTCHFLEX IN REAR, NEXT TO "A" JRST FPWRC1 FGNDDC: MOVE TT,L2N+"F" SKIPE L8X30F MOVE TT,L2N+"J" FPWRC1: TDZ A,[MAPCON,,-1] ;CLEAR DIP LOC STUFF DPB TT,[%DIPG,,A] ;FIND CONN GROUNDS ON "F" ROW MOVEI TT,0 DPB TT,[%DIPS,,A] ;THIS WILL BE SOCKET PIN PUSH P,A ;-4(P) TEST LOC MOVE A,T ;ORIGINAL CONNECTOR PIN PUSHJ P,MAPIT ;GET X,Y SETZ T, HLRE TT,T PUSH P,TT ;-3(P) X HRRES T PUSH P,T ;-2(P) Y PUSH P,[0] ;-1(P) CLOSEST SO FAR PUSH P,[377777,,-1] ;0(P) BEST DISTANCE SO FAR FPWGL: LDB T,[%DIPS,,-4(P)] AOS T CAMLE T,GRPCOL ;GO THRU WHOLE ROW, LOOKING FOR BEST JRST [ MOVE A,-1(P) SUB P,[5,,5] POPJ P,] DPB T,[%DIPS,,-4(P)] MOVE A,-4(P) PUSHJ P,MAPIT JRST FPWGL HLRE TT,T SUB TT,-3(P) ;X IMUL TT,TT HRRES T SUB T,-2(P) IMUL T,T ADD T,TT ;DISTANCE CAML T,0(P) JRST FPWGL MOVEM T,0(P) MOVE A,-4(P) MOVEM A,-1(P) JRST FPWGL FOR NAME (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:) >;MWL >;MDWL BEND LG684